Message ID | 20211117154429.2274443-1-michael.riesch@wolfvision.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a | expand |
On 11/17/21 4:44 PM, Michael Riesch wrote: > Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 > Quartz64 Model A. > > Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> > --- > .../boot/dts/rockchip/rk3566-quartz64-a.dts | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts > index 4d4b2a301b1a..9fba790c6af4 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts > @@ -205,6 +205,16 @@ &gmac1m0_clkinout > status = "okay"; > }; > > +&hdmi { > + status = "okay"; > + avdd-0v9-supply = <&vdda_0v9>; > + avdd-1v8-supply = <&vcc_1v8>; Heiko's sort rules: compatible reg interrupts [alphabetical] status [if needed] > +}; > + > +&hdmi_in_vp0 { > + status = "okay"; > +}; > + > &i2c0 { > status = "okay"; > > @@ -546,3 +556,17 @@ bluetooth { > &uart2 { > status = "okay"; > }; > + > +&vop { > + status = "okay"; status below > + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; > + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; > +}; > + > +&vop_mmu { > + status = "okay"; > +}; > + > +&vp0_out_hdmi { > + status = "okay"; > +}; >
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 4d4b2a301b1a..9fba790c6af4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -205,6 +205,16 @@ &gmac1m0_clkinout status = "okay"; }; +&hdmi { + status = "okay"; + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcc_1v8>; +}; + +&hdmi_in_vp0 { + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -546,3 +556,17 @@ bluetooth { &uart2 { status = "okay"; }; + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0_out_hdmi { + status = "okay"; +};
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 Quartz64 Model A. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+)