diff mbox series

[3/9] drm/i915/gvt: Constify intel_gvt_irq_ops

Message ID 20211204105527.15741-4-rikard.falkeborn@gmail.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/gvt: Constify static structs | expand

Commit Message

Rikard Falkeborn Dec. 4, 2021, 10:55 a.m. UTC
These are never modified, so make them const to allow the compiler to
put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
---
 drivers/gpu/drm/i915/gvt/interrupt.c | 10 +++++-----
 drivers/gpu/drm/i915/gvt/interrupt.h |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Wang, Zhi A Dec. 10, 2021, 8:11 a.m. UTC | #1
On 12/4/2021 12:55 PM, Rikard Falkeborn wrote:
> These are never modified, so make them const to allow the compiler to
> put them in read-only memory.
>
> Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
> ---
>   drivers/gpu/drm/i915/gvt/interrupt.c | 10 +++++-----
>   drivers/gpu/drm/i915/gvt/interrupt.h |  2 +-
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
> index 614b951d919f..9ccc6b1ecc28 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.c
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.c
> @@ -176,7 +176,7 @@ int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 imr = *(u32 *)p_data;
>   
>   	trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
> @@ -206,7 +206,7 @@ int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 ier = *(u32 *)p_data;
>   	u32 virtual_ier = vgpu_vreg(vgpu, reg);
>   
> @@ -246,7 +246,7 @@ int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct drm_i915_private *i915 = gvt->gt->i915;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	struct intel_gvt_irq_info *info;
>   	u32 ier = *(u32 *)p_data;
>   
> @@ -604,7 +604,7 @@ static void gen8_init_irq(
>   	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
>   }
>   
> -static struct intel_gvt_irq_ops gen8_irq_ops = {
> +static const struct intel_gvt_irq_ops gen8_irq_ops = {
>   	.init_irq = gen8_init_irq,
>   	.check_pending_irq = gen8_check_pending_irq,
>   };
> @@ -626,7 +626,7 @@ void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct intel_gvt_irq *irq = &gvt->irq;
>   	gvt_event_virt_handler_t handler;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   
>   	handler = get_event_virt_handler(irq, event);
>   	drm_WARN_ON(&i915->drm, !handler);
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
> index 6c47d3e33161..0989e180ed54 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.h
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.h
> @@ -203,7 +203,7 @@ struct intel_gvt_irq_map {
>   
>   /* structure containing device specific IRQ state */
>   struct intel_gvt_irq {
> -	struct intel_gvt_irq_ops *ops;
> +	const struct intel_gvt_irq_ops *ops;
>   	struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
>   	DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
>   	struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
index 614b951d919f..9ccc6b1ecc28 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.c
+++ b/drivers/gpu/drm/i915/gvt/interrupt.c
@@ -176,7 +176,7 @@  int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
 	unsigned int reg, void *p_data, unsigned int bytes)
 {
 	struct intel_gvt *gvt = vgpu->gvt;
-	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
 	u32 imr = *(u32 *)p_data;
 
 	trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
@@ -206,7 +206,7 @@  int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
 	unsigned int reg, void *p_data, unsigned int bytes)
 {
 	struct intel_gvt *gvt = vgpu->gvt;
-	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
 	u32 ier = *(u32 *)p_data;
 	u32 virtual_ier = vgpu_vreg(vgpu, reg);
 
@@ -246,7 +246,7 @@  int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
 {
 	struct intel_gvt *gvt = vgpu->gvt;
 	struct drm_i915_private *i915 = gvt->gt->i915;
-	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
 	struct intel_gvt_irq_info *info;
 	u32 ier = *(u32 *)p_data;
 
@@ -604,7 +604,7 @@  static void gen8_init_irq(
 	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
 }
 
-static struct intel_gvt_irq_ops gen8_irq_ops = {
+static const struct intel_gvt_irq_ops gen8_irq_ops = {
 	.init_irq = gen8_init_irq,
 	.check_pending_irq = gen8_check_pending_irq,
 };
@@ -626,7 +626,7 @@  void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
 	struct intel_gvt *gvt = vgpu->gvt;
 	struct intel_gvt_irq *irq = &gvt->irq;
 	gvt_event_virt_handler_t handler;
-	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
 
 	handler = get_event_virt_handler(irq, event);
 	drm_WARN_ON(&i915->drm, !handler);
diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
index 6c47d3e33161..0989e180ed54 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.h
+++ b/drivers/gpu/drm/i915/gvt/interrupt.h
@@ -203,7 +203,7 @@  struct intel_gvt_irq_map {
 
 /* structure containing device specific IRQ state */
 struct intel_gvt_irq {
-	struct intel_gvt_irq_ops *ops;
+	const struct intel_gvt_irq_ops *ops;
 	struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
 	DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
 	struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];