| Message ID | 20211217093325.30612-2-conor.dooley@microchip.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | Update the Icicle Kit device tree | expand |
On Fri, 17 Dec 2021 09:33:09 +0000, conor.dooley@microchip.com wrote: > From: Ivan Griffin <ivan.griffin@microchip.com> > > Provide named identifiers for device tree for RISC-V interrupts. > > Licensed under GPL and MIT, as this file may be useful to any OS that > uses device tree. > > Signed-off-by: Ivan Griffin <ivan.griffin@microchip.com> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../interrupt-controller/riscv-hart.h | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/interrupt-controller/riscv-hart.h b/include/dt-bindings/interrupt-controller/riscv-hart.h new file mode 100644 index 000000000000..e1c32f6090ac --- /dev/null +++ b/include/dt-bindings/interrupt-controller/riscv-hart.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2021 Microchip Technology Inc. All rights reserved. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H + +#define HART_INT_U_SOFT 0 +#define HART_INT_S_SOFT 1 +#define HART_INT_M_SOFT 3 +#define HART_INT_U_TIMER 4 +#define HART_INT_S_TIMER 5 +#define HART_INT_M_TIMER 7 +#define HART_INT_U_EXT 8 +#define HART_INT_S_EXT 9 +#define HART_INT_M_EXT 11 + +#endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H */