| Message ID | 20211109115020.31623-3-german.gomez@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | perf arm-spe: Track pid/tid for Arm SPE samples | expand |
On Tue, Nov 09, 2021 at 11:50:18AM +0000, German Gomez wrote: > Update perf-record docs and Arm SPE recording options so that they are > consistent. This includes supporting the --no-switch-events flag in Arm > SPE as well. > > Signed-off-by: German Gomez <german.gomez@arm.com> Reviewed-by: Leo Yan <leo.yan@linaro.org> > --- > tools/perf/Documentation/perf-record.txt | 2 +- > tools/perf/arch/arm64/util/arm-spe.c | 4 +++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt > index 2d7df8703..3cf7bac67 100644 > --- a/tools/perf/Documentation/perf-record.txt > +++ b/tools/perf/Documentation/perf-record.txt > @@ -469,7 +469,7 @@ This option sets the time out limit. The default value is 500 ms. > > --switch-events:: > Record context switch events i.e. events of type PERF_RECORD_SWITCH or > -PERF_RECORD_SWITCH_CPU_WIDE. In some cases (e.g. Intel PT or CoreSight) > +PERF_RECORD_SWITCH_CPU_WIDE. In some cases (e.g. Intel PT, CoreSight or Arm SPE) > switch events will be enabled automatically, which can be suppressed by > by the option --no-switch-events. > > diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c > index 58ba8d15c..725a06cd2 100644 > --- a/tools/perf/arch/arm64/util/arm-spe.c > +++ b/tools/perf/arch/arm64/util/arm-spe.c > @@ -169,8 +169,10 @@ static int arm_spe_recording_options(struct auxtrace_record *itr, > if (!perf_cpu_map__empty(cpus)) { > evsel__set_sample_bit(tracking_evsel, TIME); > evsel__set_sample_bit(tracking_evsel, CPU); > + > /* also track task context switch */ > - tracking_evsel->core.attr.context_switch = 1; > + if (!record_opts__no_switch_events(opts)) > + tracking_evsel->core.attr.context_switch = 1; > } > > return 0; > -- > 2.25.1 >
On Wed, Nov 10, 2021 at 11:18 PM Leo Yan <leo.yan@linaro.org> wrote: > > On Tue, Nov 09, 2021 at 11:50:18AM +0000, German Gomez wrote: > > Update perf-record docs and Arm SPE recording options so that they are > > consistent. This includes supporting the --no-switch-events flag in Arm > > SPE as well. > > > > Signed-off-by: German Gomez <german.gomez@arm.com> > > Reviewed-by: Leo Yan <leo.yan@linaro.org> Acked-by: Namhyung Kim <namhyung@kernel.org> Thanks, Namhyung
diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt index 2d7df8703..3cf7bac67 100644 --- a/tools/perf/Documentation/perf-record.txt +++ b/tools/perf/Documentation/perf-record.txt @@ -469,7 +469,7 @@ This option sets the time out limit. The default value is 500 ms. --switch-events:: Record context switch events i.e. events of type PERF_RECORD_SWITCH or -PERF_RECORD_SWITCH_CPU_WIDE. In some cases (e.g. Intel PT or CoreSight) +PERF_RECORD_SWITCH_CPU_WIDE. In some cases (e.g. Intel PT, CoreSight or Arm SPE) switch events will be enabled automatically, which can be suppressed by by the option --no-switch-events. diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c index 58ba8d15c..725a06cd2 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -169,8 +169,10 @@ static int arm_spe_recording_options(struct auxtrace_record *itr, if (!perf_cpu_map__empty(cpus)) { evsel__set_sample_bit(tracking_evsel, TIME); evsel__set_sample_bit(tracking_evsel, CPU); + /* also track task context switch */ - tracking_evsel->core.attr.context_switch = 1; + if (!record_opts__no_switch_events(opts)) + tracking_evsel->core.attr.context_switch = 1; } return 0;
Update perf-record docs and Arm SPE recording options so that they are consistent. This includes supporting the --no-switch-events flag in Arm SPE as well. Signed-off-by: German Gomez <german.gomez@arm.com> --- tools/perf/Documentation/perf-record.txt | 2 +- tools/perf/arch/arm64/util/arm-spe.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-)