| Message ID | 20211102072058.4107-1-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [RFC] soc: mediatek: Add support always on flag | expand |
Il 02/11/21 08:20, Chunfeng Yun ha scritto: > There is a t-phy shared by PCIe and USB3 on mt8195, if the t-phy is > used by PCIe, when power off its mtcmos, need software reset it > (workaround way, usually hardware do it, but has an issue on mt8195), > but it has side effect to USB2 phy(works with USB3 phy to support > USB3.2 Gen1), so add support GENPD_FLAG_ALWAYS_ON flag, and make its > power always on; > Another reason is that USB3.2 Gen1/2 need keep power always on when > support runtime-pm due to hardware limitation until now; > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > --- > drivers/soc/mediatek/mt8195-pm-domains.h | 2 +- > drivers/soc/mediatek/mtk-pm-domains.c | 2 ++ > drivers/soc/mediatek/mtk-pm-domains.h | 1 + > 3 files changed, 4 insertions(+), 1 deletion(-) > Hello Chunfeng, what are are the side effects on the USB2 PHY? Can you please expand? Also, wouldn't it be possible to also reset the USB2 PHY when resetting the t-phy in order to get it back up and running? Moreover, as for the USB3.2 hardware limitation... I would say that this is more like something that has to be accounted for in the USB driver, instead of the PM domains driver... unless there's some reason that stops you from doing that? Thanks, - Angelo
On Thu, 2021-11-11 at 14:56 +0100, AngeloGioacchino Del Regno wrote: > Il 02/11/21 08:20, Chunfeng Yun ha scritto: > > There is a t-phy shared by PCIe and USB3 on mt8195, if the t-phy is > > used by PCIe, when power off its mtcmos, need software reset it > > (workaround way, usually hardware do it, but has an issue on > > mt8195), > > but it has side effect to USB2 phy(works with USB3 phy to support > > USB3.2 Gen1), so add support GENPD_FLAG_ALWAYS_ON flag, and make > > its > > power always on; > > Another reason is that USB3.2 Gen1/2 need keep power always on when > > support runtime-pm due to hardware limitation until now; > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > > --- > > drivers/soc/mediatek/mt8195-pm-domains.h | 2 +- > > drivers/soc/mediatek/mtk-pm-domains.c | 2 ++ > > drivers/soc/mediatek/mtk-pm-domains.h | 1 + > > 3 files changed, 4 insertions(+), 1 deletion(-) > > > > Hello Chunfeng, > what are are the side effects on the USB2 PHY? Can you please expand? Sorry for later reply, I missed this message. the side effect on u2 phy is that it will cause u2 phy power off and cause other issues, e.g. if there is a device plugged in u2 port, it will disconnect, more over it will not work until reboot platform. > > Also, wouldn't it be possible to also reset the USB2 PHY when > resetting the t-phy > in order to get it back up and running? No, the usb driver don't reset or reinit phy after probe; > > Moreover, as for the USB3.2 hardware limitation... I would say that > this is more > like something that has to be accounted for in the USB driver, > instead of the PM > domains driver... unless there's some reason that stops you from > doing that? Usb driver itself can't handle this case. but power domain's driver can handle it easily. > > Thanks, > - Angelo
diff --git a/drivers/soc/mediatek/mt8195-pm-domains.h b/drivers/soc/mediatek/mt8195-pm-domains.h index 1379aa39bf16..b6949874c72b 100644 --- a/drivers/soc/mediatek/mt8195-pm-domains.h +++ b/drivers/soc/mediatek/mt8195-pm-domains.h @@ -67,7 +67,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8195[] = { .ctl_offs = 0x334, .pwr_sta_offs = 0x174, .pwr_sta2nd_offs = 0x178, - .caps = MTK_SCPD_ACTIVE_WAKEUP, + .caps = MTK_SCPD_ALWAYS_ON, }, [MT8195_POWER_DOMAIN_CSI_RX_TOP] = { .name = "csi_rx_top", diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 61973a306e97..b89e5e3e3363 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -446,6 +446,8 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no if (MTK_SCPD_CAPS(pd, MTK_SCPD_ACTIVE_WAKEUP)) pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP; + if (MTK_SCPD_CAPS(pd, MTK_SCPD_ALWAYS_ON)) + pd->genpd.flags |= GENPD_FLAG_ALWAYS_ON; if (MTK_SCPD_CAPS(pd, MTK_SCPD_KEEP_DEFAULT_OFF)) pm_genpd_init(&pd->genpd, NULL, true); diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h index daa24e890dd4..419d23d5e394 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.h +++ b/drivers/soc/mediatek/mtk-pm-domains.h @@ -8,6 +8,7 @@ #define MTK_SCPD_SRAM_ISO BIT(2) #define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3) #define MTK_SCPD_DOMAIN_SUPPLY BIT(4) +#define MTK_SCPD_ALWAYS_ON BIT(5) #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) #define SPM_VDE_PWR_CON 0x0210
There is a t-phy shared by PCIe and USB3 on mt8195, if the t-phy is used by PCIe, when power off its mtcmos, need software reset it (workaround way, usually hardware do it, but has an issue on mt8195), but it has side effect to USB2 phy(works with USB3 phy to support USB3.2 Gen1), so add support GENPD_FLAG_ALWAYS_ON flag, and make its power always on; Another reason is that USB3.2 Gen1/2 need keep power always on when support runtime-pm due to hardware limitation until now; Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- drivers/soc/mediatek/mt8195-pm-domains.h | 2 +- drivers/soc/mediatek/mtk-pm-domains.c | 2 ++ drivers/soc/mediatek/mtk-pm-domains.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-)