Message ID | 20211028070344.12652-1-chunkeey@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v1] ARM: BCM53016: MR32: convert to Broadcom iProc I2C Driver | expand |
On Thu, 28 Oct 2021 09:03:44 +0200, Christian Lamparter <chunkeey@gmail.com> wrote: > replaces the bit-banged i2c-gpio provided i2c functionality > with the hardware in the SoC. > > During review of the MR32, Florian Fainelli pointed out that the > SoC has a real I2C-controller. Furthermore, the connected pins > (SDA and SCL) would line up perfectly for use. Back then I couldn't > get it working though and I left it with i2c-gpio (which worked). > > Now we know the reason: the interrupt was incorrectly specified. > (Hence, this patch depends on Florian Fainelli's > "ARM: dts: BCM5301X: Fix I2C controller interrupt" patch). > > Cc: Florian Fainelli <f.fainelli@gmail.com> > Cc: Rafał Miłecki <zajec5@gmail.com> > Cc: Matthew Hagan <mnhagan88@gmail.com> > Signed-off-by: Christian Lamparter <chunkeey@gmail.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks! -- Florian
diff --git a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts index c58e75dde7b3..6ae74c3d85c3 100644 --- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts +++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts @@ -84,40 +84,6 @@ blue { max-brightness = <255>; }; }; - - i2c { - /* - * The platform provided I2C does not budge. - * This is a replacement until I can figure - * out what are the missing bits... - */ - - compatible = "i2c-gpio"; - sda-gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>; - scl-gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>; - i2c-gpio,delay-us = <10>; /* close to 100 kHz */ - #address-cells = <1>; - #size-cells = <0>; - - current_sense: ina219@45 { - compatible = "ti,ina219"; - reg = <0x45>; - shunt-resistor = <60000>; /* = 60 mOhms */ - }; - - eeprom: eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - pagesize = <32>; - read-only; - #address-cells = <1>; - #size-cells = <1>; - - mac_address: mac-address@66 { - reg = <0x66 0x6>; - }; - }; - }; }; &uart0 { @@ -228,3 +194,31 @@ fixed-link { }; }; }; + +&i2c0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_i2c>; + + clock-frequency = <100000>; + + current_sense: ina219@45 { + compatible = "ti,ina219"; + reg = <0x45>; + shunt-resistor = <60000>; /* = 60 mOhms */ + }; + + eeprom: eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + pagesize = <32>; + read-only; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + reg = <0x66 0x6>; + }; + }; +};
replaces the bit-banged i2c-gpio provided i2c functionality with the hardware in the SoC. During review of the MR32, Florian Fainelli pointed out that the SoC has a real I2C-controller. Furthermore, the connected pins (SDA and SCL) would line up perfectly for use. Back then I couldn't get it working though and I left it with i2c-gpio (which worked). Now we know the reason: the interrupt was incorrectly specified. (Hence, this patch depends on Florian Fainelli's "ARM: dts: BCM5301X: Fix I2C controller interrupt" patch). Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Matthew Hagan <mnhagan88@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> --- arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 62 ++++++++++------------ 1 file changed, 28 insertions(+), 34 deletions(-)