| Message ID | 20211107075646.4366-4-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/6] dt-bindings: nvmem: mediatek: add support bits property | expand |
On Sun, 07 Nov 2021 15:56:44 +0800, Chunfeng Yun wrote: > Add optional property nvmem-cells and nvmem-cell-names to support > software efuse load, this helps to fix the efuse bit shift issue > on mt8195 etc. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > --- > .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
On 07/11/2021 07:56, Chunfeng Yun wrote: > Add optional property nvmem-cells and nvmem-cell-names to support > software efuse load, this helps to fix the efuse bit shift issue > on mt8195 etc. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Applied thanks, --srini > --- > .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > index 9e6c0f43f1c6..05ee274b4b71 100644 > --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > @@ -160,6 +160,24 @@ patternProperties: > - PHY_TYPE_PCIE > - PHY_TYPE_SATA > > + nvmem-cells: > + items: > + - description: internal R efuse for U2 PHY or U3/PCIe PHY > + - description: rx_imp_sel efuse for U3/PCIe PHY > + - description: tx_imp_sel efuse for U3/PCIe PHY > + description: | > + Phandles to nvmem cell that contains the efuse data; > + Available only for U2 PHY or U3/PCIe PHY of version 2/3, these > + three items should be provided at the same time for U3/PCIe PHY, > + when use software to load efuse; > + If unspecified, will use hardware auto-load efuse. > + > + nvmem-cell-names: > + items: > + - const: intr > + - const: rx_imp > + - const: tx_imp > + > # The following optional vendor properties are only for debug or HQA test > mediatek,eye-src: > description: >
On Sat, Nov 20, 2021 at 1:19 AM Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote: > On 07/11/2021 07:56, Chunfeng Yun wrote: > > Add optional property nvmem-cells and nvmem-cell-names to support > > software efuse load, this helps to fix the efuse bit shift issue > > on mt8195 etc. > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > > Applied thanks, This is a PHY DT binding change. Shouldn't it go in with patch 5, the phy driver patch, through the PHY tree instead? ChenYu > --srini > > > --- > > .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > index 9e6c0f43f1c6..05ee274b4b71 100644 > > --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > @@ -160,6 +160,24 @@ patternProperties: > > - PHY_TYPE_PCIE > > - PHY_TYPE_SATA > > > > + nvmem-cells: > > + items: > > + - description: internal R efuse for U2 PHY or U3/PCIe PHY > > + - description: rx_imp_sel efuse for U3/PCIe PHY > > + - description: tx_imp_sel efuse for U3/PCIe PHY > > + description: | > > + Phandles to nvmem cell that contains the efuse data; > > + Available only for U2 PHY or U3/PCIe PHY of version 2/3, these > > + three items should be provided at the same time for U3/PCIe PHY, > > + when use software to load efuse; > > + If unspecified, will use hardware auto-load efuse. > > + > > + nvmem-cell-names: > > + items: > > + - const: intr > > + - const: rx_imp > > + - const: tx_imp > > + > > # The following optional vendor properties are only for debug or HQA test > > mediatek,eye-src: > > description: > > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On 22/11/2021 04:05, Chen-Yu Tsai wrote: > On Sat, Nov 20, 2021 at 1:19 AM Srinivas Kandagatla > <srinivas.kandagatla@linaro.org> wrote: >> On 07/11/2021 07:56, Chunfeng Yun wrote: >>> Add optional property nvmem-cells and nvmem-cell-names to support >>> software efuse load, this helps to fix the efuse bit shift issue >>> on mt8195 etc. >>> >>> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> >> >> Applied thanks, > > This is a PHY DT binding change. Shouldn't it go in with patch 5, the > phy driver patch, through the PHY tree instead? That's true, this is dropped from nvmem tree now! --srini > > ChenYu > >> --srini >> >>> --- >>> .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 ++++++++++++++++++ >>> 1 file changed, 18 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml >>> index 9e6c0f43f1c6..05ee274b4b71 100644 >>> --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml >>> +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml >>> @@ -160,6 +160,24 @@ patternProperties: >>> - PHY_TYPE_PCIE >>> - PHY_TYPE_SATA >>> >>> + nvmem-cells: >>> + items: >>> + - description: internal R efuse for U2 PHY or U3/PCIe PHY >>> + - description: rx_imp_sel efuse for U3/PCIe PHY >>> + - description: tx_imp_sel efuse for U3/PCIe PHY >>> + description: | >>> + Phandles to nvmem cell that contains the efuse data; >>> + Available only for U2 PHY or U3/PCIe PHY of version 2/3, these >>> + three items should be provided at the same time for U3/PCIe PHY, >>> + when use software to load efuse; >>> + If unspecified, will use hardware auto-load efuse. >>> + >>> + nvmem-cell-names: >>> + items: >>> + - const: intr >>> + - const: rx_imp >>> + - const: tx_imp >>> + >>> # The following optional vendor properties are only for debug or HQA test >>> mediatek,eye-src: >>> description: >>> >> >> _______________________________________________ >> Linux-mediatek mailing list >> Linux-mediatek@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Mon, 2021-11-22 at 09:21 +0000, Srinivas Kandagatla wrote: > > On 22/11/2021 04:05, Chen-Yu Tsai wrote: > > On Sat, Nov 20, 2021 at 1:19 AM Srinivas Kandagatla > > <srinivas.kandagatla@linaro.org> wrote: > > > On 07/11/2021 07:56, Chunfeng Yun wrote: > > > > Add optional property nvmem-cells and nvmem-cell-names to > > > > support > > > > software efuse load, this helps to fix the efuse bit shift > > > > issue > > > > on mt8195 etc. > > > > > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > > > > > > Applied thanks, > > > > This is a PHY DT binding change. Shouldn't it go in with patch 5, > > the > > phy driver patch, through the PHY tree instead? > > That's true, this is dropped from nvmem tree now! Thanks > > --srini > > > > ChenYu > > > > > --srini > > > > > > > --- > > > > .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 > > > > ++++++++++++++++++ > > > > 1 file changed, 18 insertions(+) > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > > > b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > > > index 9e6c0f43f1c6..05ee274b4b71 100644 > > > > --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > > > +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml > > > > @@ -160,6 +160,24 @@ patternProperties: > > > > - PHY_TYPE_PCIE > > > > - PHY_TYPE_SATA > > > > > > > > + nvmem-cells: > > > > + items: > > > > + - description: internal R efuse for U2 PHY or > > > > U3/PCIe PHY > > > > + - description: rx_imp_sel efuse for U3/PCIe PHY > > > > + - description: tx_imp_sel efuse for U3/PCIe PHY > > > > + description: | > > > > + Phandles to nvmem cell that contains the efuse data; > > > > + Available only for U2 PHY or U3/PCIe PHY of version > > > > 2/3, these > > > > + three items should be provided at the same time for > > > > U3/PCIe PHY, > > > > + when use software to load efuse; > > > > + If unspecified, will use hardware auto-load efuse. > > > > + > > > > + nvmem-cell-names: > > > > + items: > > > > + - const: intr > > > > + - const: rx_imp > > > > + - const: tx_imp > > > > + > > > > # The following optional vendor properties are only > > > > for debug or HQA test > > > > mediatek,eye-src: > > > > description: > > > > > > > > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 9e6c0f43f1c6..05ee274b4b71 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -160,6 +160,24 @@ patternProperties: - PHY_TYPE_PCIE - PHY_TYPE_SATA + nvmem-cells: + items: + - description: internal R efuse for U2 PHY or U3/PCIe PHY + - description: rx_imp_sel efuse for U3/PCIe PHY + - description: tx_imp_sel efuse for U3/PCIe PHY + description: | + Phandles to nvmem cell that contains the efuse data; + Available only for U2 PHY or U3/PCIe PHY of version 2/3, these + three items should be provided at the same time for U3/PCIe PHY, + when use software to load efuse; + If unspecified, will use hardware auto-load efuse. + + nvmem-cell-names: + items: + - const: intr + - const: rx_imp + - const: tx_imp + # The following optional vendor properties are only for debug or HQA test mediatek,eye-src: description:
Add optional property nvmem-cells and nvmem-cell-names to support software efuse load, this helps to fix the efuse bit shift issue on mt8195 etc. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- .../devicetree/bindings/phy/mediatek,tphy.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)