[v3,0/8] phy: socionext: Introduce some features for UniPhier SoCs

Message

Kunihiko Hayashi Oct. 29, 2021, 10:38 a.m. UTC

This series includes the patches to add the following features:
- Add basic support for new UniPhier NX1 SoC to USB3 and PCIe PHY.
  NX1 SoC also has the same kinds of controls as the other UniPhier SoCs.
- Add a PHY parameters to PCIe PHY
- Add dual-phy support for the SoCs that has two phys to PCIe PHY
- Add basic support for Pro4 SoC to ACHI PHY

---
Changes since v2:
- Fix order of clock-names and reset-names in dt-bindings
- Add minItems to clocks in dt-bindings
- Add Acked-by: lines

Changes since v1:
- Fix indentation of clocks and resets in AHCI PHY binding documentation
- Fix insufficient argument issue when adding dual-phy to PCIe PHY

Kunihiko Hayashi (8):
  dt-bindings: phy: uniphier-usb3: Add bindings for NX1 SoC
  phy: uniphier-usb3: Add compatible string for NX1 SoC
  dt-bindings: phy: uniphier-pcie: Add bindings for NX1 SoC
  phy: uniphier-pcie: Add compatible string and SoC-dependent data for
    NX1 SoC
  phy: uniphier-pcie: Set VCOPLL clamp mode in PHY register
  phy: uniphier-pcie: Add dual-phy support for NX1 SoC
  dt-bindings: phy: uniphier-ahci: Add bindings for Pro4 SoC
  phy: uniphier-ahci: Add support for Pro4 SoC

 .../bindings/phy/socionext,uniphier-ahci-phy.yaml  |  21 ++-
 .../bindings/phy/socionext,uniphier-pcie-phy.yaml  |   1 +
 .../phy/socionext,uniphier-usb3hs-phy.yaml         |   1 +
 .../phy/socionext,uniphier-usb3ss-phy.yaml         |   1 +
 drivers/phy/socionext/Kconfig                      |   2 +-
 drivers/phy/socionext/phy-uniphier-ahci.c          | 201 ++++++++++++++++++++-
 drivers/phy/socionext/phy-uniphier-pcie.c          |  70 +++++--
 drivers/phy/socionext/phy-uniphier-usb3hs.c        |   4 +
 drivers/phy/socionext/phy-uniphier-usb3ss.c        |   4 +
 9 files changed, 283 insertions(+), 22 deletions(-)

Comments

Vinod Koul Nov. 23, 2021, 5:52 a.m. UTC | #1

On 29-10-21, 19:38, Kunihiko Hayashi wrote:
> This series includes the patches to add the following features:
> - Add basic support for new UniPhier NX1 SoC to USB3 and PCIe PHY.
>   NX1 SoC also has the same kinds of controls as the other UniPhier SoCs.
> - Add a PHY parameters to PCIe PHY
> - Add dual-phy support for the SoCs that has two phys to PCIe PHY
> - Add basic support for Pro4 SoC to ACHI PHY

Applied, thanks