diff mbox series

[v2,1/2] arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB

Message ID 20211018011211.3836590-2-chris.packham@alliedtelesis.co.nz (mailing list archive)
State New, archived
Headers show
Series arm/arm64: dts: Enable more network hardware | expand

Commit Message

Chris Packham Oct. 18, 2021, 1:12 a.m. UTC 
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
Change in v2:
- New

 arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Marek Behún Nov. 26, 2021, 5:10 p.m. UTC | #1 
On Mon, 18 Oct 2021 14:12:10 +1300
Chris Packham <chris.packham@alliedtelesis.co.nz> wrote:

> Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
> number of the peripheral devices to function.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

Reviewed-by: Marek Behún <kabel@kernel.org>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index e7918f325646..0885c6339d1b 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -17,6 +17,8 @@  aliases {
 		ethernet0 = &cp0_eth0;
 		ethernet1 = &cp0_eth1;
 		ethernet2 = &cp0_eth2;
+		gpio1 = &cp0_gpio1;
+		gpio2 = &cp0_gpio2;
 	};
 
 	memory@0 {
@@ -114,6 +116,14 @@  cp0_spi0_pins: cp0-spi-pins-0 {
 	};
 };
 
+&cp0_gpio1 {
+	status = "okay";
+};
+
+&cp0_gpio2 {
+	status = "okay";
+};
+
 &cp0_i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&cp0_i2c0_pins>;