| Message ID | 20211208150543.10643-1-cniedermaier@dh-electronics.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs | expand |
Hi Christoph, On 08/12/2021 12:05, Christoph Niedermaier wrote: > According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1] > the reset should stay asserted for at least 100uS and software > should wait at least 200nS. On other DHCOM SoMs with the SMSC > LAN8710Ai PHY both reset delays are 500us. This should be plenty > and for consistency, the i.MX6 SoM should also use these delays. > > [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf > > Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Fabio Estevam <festevam@denx.de> > Cc: Marek Vasut <marex@denx.de> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: kernel@dh-electronics.com > To: linux-arm-kernel@lists.infradead.org Reviewed-by: Fabio Estevam <festevam@denx.de>
On Wed, Dec 08, 2021 at 04:05:43PM +0100, Christoph Niedermaier wrote: > According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1] > the reset should stay asserted for at least 100uS and software > should wait at least 200nS. On other DHCOM SoMs with the SMSC > LAN8710Ai PHY both reset delays are 500us. This should be plenty > and for consistency, the i.MX6 SoM should also use these delays. > > [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf > > Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Fabio Estevam <festevam@denx.de> > Cc: Marek Vasut <marex@denx.de> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: kernel@dh-electronics.com > To: linux-arm-kernel@lists.infradead.org Applied, thanks!
diff --git a/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi b/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi index 5d10c40313cb..e71687061161 100644 --- a/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi @@ -138,8 +138,8 @@ pinctrl-0 = <&pinctrl_ethphy0>; pinctrl-names = "default"; reg = <0>; - reset-assert-us = <1000>; - reset-deassert-us = <1000>; + reset-assert-us = <500>; + reset-deassert-us = <500>; reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; smsc,disable-energy-detect; /* Make plugin detection reliable */ };
According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1] the reset should stay asserted for at least 100uS and software should wait at least 200nS. On other DHCOM SoMs with the SMSC LAN8710Ai PHY both reset delays are 500us. This should be plenty and for consistency, the i.MX6 SoM should also use these delays. [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: kernel@dh-electronics.com To: linux-arm-kernel@lists.infradead.org --- arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)