Message ID | 20211217112345.14029-7-nbd@nbd.name (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | None | expand |
Quoting Felix Fietkau (2021-12-17 03:23:36) > diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml > new file mode 100644 > index 000000000000..79660f8126fa > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: EN7523 Clock Device Tree Bindings > + > +maintainers: > + - Felix Fietkau <nbd@nbd.name> > + - John Crispin <nbd@nbd.name> > + > +description: | > + This node defines the System Control Unit of the EN7523 SoC, > + a collection of registers configuring many different aspects of the SoC. > + > + The clock driver uses it to read and configure settings of the > + PLL controller, which provides clocks for the CPU, the bus and > + other SoC internal peripherals. > + > + Each clock is assigned an identifier and client nodes use this identifier > + to specify which clock they consume. > + > + All these identifiers can be found in: > + [1]: <include/dt-bindings/clock/en7523-clk.h>. > + > + The clocks are provided inside a system controller node. > + > +properties: > + compatible: > + items: > + - const: airoha,en7523-scu > + > + reg: > + maxItems: 2 > + > + "#clock-cells": > + description: > + The first cell indicates the clock number, see [1] for available > + clocks. > + const: 1 > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + Any input clocks? > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/en7523-clk.h> > + scu: scu@1fa20000 { Maybe that should be system-controller@1fa20000 instead? > + compatible = "airoha,en7523-scu"; > + reg = <0x1fa20000 0x400>, > + <0x1fb00000 0x1000>; > + #clock-cells = <1>; > + };
diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml new file mode 100644 index 000000000000..79660f8126fa --- /dev/null +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EN7523 Clock Device Tree Bindings + +maintainers: + - Felix Fietkau <nbd@nbd.name> + - John Crispin <nbd@nbd.name> + +description: | + This node defines the System Control Unit of the EN7523 SoC, + a collection of registers configuring many different aspects of the SoC. + + The clock driver uses it to read and configure settings of the + PLL controller, which provides clocks for the CPU, the bus and + other SoC internal peripherals. + + Each clock is assigned an identifier and client nodes use this identifier + to specify which clock they consume. + + All these identifiers can be found in: + [1]: <include/dt-bindings/clock/en7523-clk.h>. + + The clocks are provided inside a system controller node. + +properties: + compatible: + items: + - const: airoha,en7523-scu + + reg: + maxItems: 2 + + "#clock-cells": + description: + The first cell indicates the clock number, see [1] for available + clocks. + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/en7523-clk.h> + scu: scu@1fa20000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/en7523-clk.h b/include/dt-bindings/clock/en7523-clk.h new file mode 100644 index 000000000000..717d23a5e5ae --- /dev/null +++ b/include/dt-bindings/clock/en7523-clk.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ +#define _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ + +#define EN7523_CLK_GSW 0 +#define EN7523_CLK_EMI 1 +#define EN7523_CLK_BUS 2 +#define EN7523_CLK_SLIC 3 +#define EN7523_CLK_SPI 4 +#define EN7523_CLK_NPU 5 +#define EN7523_CLK_CRYPTO 6 +#define EN7523_CLK_PCIE 7 + +#define EN7523_NUM_CLOCKS 8 + +#endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */