diff mbox series

arm64: dts: exynos: Add missing gpm6 and gpm7 nodes to Exynos850

Message ID 20220103181826.2136-1-semen.protsenko@linaro.org (mailing list archive)
State New
Headers show
Series arm64: dts: exynos: Add missing gpm6 and gpm7 nodes to Exynos850 | expand

Commit Message

Sam Protsenko Jan. 3, 2022, 6:18 p.m. UTC
gpm6 and gpm7 nodes are missing in Exynos850 device tree. Next errors
are reported because of that:

    Missing node for bank gpm6 - invalid DTB
    Missing node for bank gpm7 - invalid DTB

Add missing nodes to make those available to use, and to fix boot
errors.

Fixes: e3493220fd3e ("arm64: dts: exynos: Add initial Exynos850 SoC support")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
NOTES:
  - Recommend to apply this patch after "arm64: dts: exynos: align
    pinctrl with dtschema in Exynos850"
  - This patch also brings back two interrupts removed in "arm64:
    dts: exynos: drop incorrectly placed wakeup interrupts in Exynos850"

 .../boot/dts/exynos/exynos850-pinctrl.dtsi    | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Krzysztof Kozlowski Jan. 7, 2022, 8:05 a.m. UTC | #1
On 03/01/2022 19:18, Sam Protsenko wrote:
> gpm6 and gpm7 nodes are missing in Exynos850 device tree. Next errors
> are reported because of that:
> 
>     Missing node for bank gpm6 - invalid DTB
>     Missing node for bank gpm7 - invalid DTB
> 
> Add missing nodes to make those available to use, and to fix boot
> errors.
> 
> Fixes: e3493220fd3e ("arm64: dts: exynos: Add initial Exynos850 SoC support")
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> NOTES:
>   - Recommend to apply this patch after "arm64: dts: exynos: align
>     pinctrl with dtschema in Exynos850"
>   - This patch also brings back two interrupts removed in "arm64:
>     dts: exynos: drop incorrectly placed wakeup interrupts in Exynos850"

I'll take it after the merge window and apply it before my series (so
without -gpio-bank suffix).

> 
>  .../boot/dts/exynos/exynos850-pinctrl.dtsi    | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> index a71acf358d2d..f43e4a206282 100644
> --- a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> @@ -194,6 +194,26 @@ gpm5: gpm5-gpio-bank {
>  		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
> +	gpm6: gpm6-gpio-bank {
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	gpm7: gpm7-gpio-bank {
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
>  	/* USI_CMGP0: HSI2C function */
>  	hsi2c3_pins: hsi2c3-pins {
>  		samsung,pins = "gpm0-0", "gpm1-0";
> 


Best regards,
Krzysztof
Sam Protsenko Jan. 14, 2022, 7:43 p.m. UTC | #2
On Fri, 7 Jan 2022 at 10:05, Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On 03/01/2022 19:18, Sam Protsenko wrote:
> > gpm6 and gpm7 nodes are missing in Exynos850 device tree. Next errors
> > are reported because of that:
> >
> >     Missing node for bank gpm6 - invalid DTB
> >     Missing node for bank gpm7 - invalid DTB
> >
> > Add missing nodes to make those available to use, and to fix boot
> > errors.
> >
> > Fixes: e3493220fd3e ("arm64: dts: exynos: Add initial Exynos850 SoC support")
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> > NOTES:
> >   - Recommend to apply this patch after "arm64: dts: exynos: align
> >     pinctrl with dtschema in Exynos850"
> >   - This patch also brings back two interrupts removed in "arm64:
> >     dts: exynos: drop incorrectly placed wakeup interrupts in Exynos850"
>
> I'll take it after the merge window and apply it before my series (so
> without -gpio-bank suffix).
>

Sure, whatever you think is best.

> >
> >  .../boot/dts/exynos/exynos850-pinctrl.dtsi    | 20 +++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> > index a71acf358d2d..f43e4a206282 100644
> > --- a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
> > @@ -194,6 +194,26 @@ gpm5: gpm5-gpio-bank {
> >               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> >       };
> >
> > +     gpm6: gpm6-gpio-bank {
> > +             gpio-controller;
> > +             #gpio-cells = <2>;
> > +
> > +             interrupt-controller;
> > +             #interrupt-cells = <2>;
> > +             interrupt-parent = <&gic>;
> > +             interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> > +     };
> > +
> > +     gpm7: gpm7-gpio-bank {
> > +             gpio-controller;
> > +             #gpio-cells = <2>;
> > +
> > +             interrupt-controller;
> > +             #interrupt-cells = <2>;
> > +             interrupt-parent = <&gic>;
> > +             interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> > +     };
> > +
> >       /* USI_CMGP0: HSI2C function */
> >       hsi2c3_pins: hsi2c3-pins {
> >               samsung,pins = "gpm0-0", "gpm1-0";
> >
>
>
> Best regards,
> Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
index a71acf358d2d..f43e4a206282 100644
--- a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi
@@ -194,6 +194,26 @@  gpm5: gpm5-gpio-bank {
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	gpm6: gpm6-gpio-bank {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	gpm7: gpm7-gpio-bank {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	/* USI_CMGP0: HSI2C function */
 	hsi2c3_pins: hsi2c3-pins {
 		samsung,pins = "gpm0-0", "gpm1-0";