diff mbox series

PCI / thunderbolt: Add quirk to handle incorrect Supported Link Speeds

Message ID 20220106224240.31052-1-sanrio.alvares@intel.com (mailing list archive)
State Superseded
Headers show
Series PCI / thunderbolt: Add quirk to handle incorrect Supported Link Speeds | expand

Commit Message

Sanrio Alvares Jan. 6, 2022, 10:42 p.m. UTC 
In PCIe config space the "Supported Link Speeds" Vector value is 0x07,
in all downstream ports for Intel Titan Ridge. Which means link
supports Gen1, Gen2 and Gen3. While actually max link speed is 2.5GT/s
so the value of this vector should be 0x01.

As a consequence of reporting >2.5GT/s, we need to delay the full 1s
which makes resuming longer than needed.

Signed-off-by: Sanrio Alvares <sanrio.alvares@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/pci/pci.c    |  4 ++++
 drivers/pci/quirks.c | 14 ++++++++++++++
 include/linux/pci.h  |  1 +
 3 files changed, 19 insertions(+)

Comments

kernel test robot Jan. 8, 2022, 11:13 a.m. UTC | #1 
Hi Sanrio,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on helgaas-pci/next]
[also build test WARNING on v5.16-rc8 next-20220107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Sanrio-Alvares/PCI-thunderbolt-Add-quirk-to-handle-incorrect-Supported-Link-Speeds/20220107-064444
base:   https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: i386-randconfig-r024-20220107 (https://download.01.org/0day-ci/archive/20220108/202201081937.sL6eGkBc-lkp@intel.com/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 32167bfe64a4c5dd4eb3f7a58e24f4cba76f5ac2)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/98f8f42acd1b8f46f3e6778fa58dd0d1cd005369
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Sanrio-Alvares/PCI-thunderbolt-Add-quirk-to-handle-incorrect-Supported-Link-Speeds/20220107-064444
        git checkout 98f8f42acd1b8f46f3e6778fa58dd0d1cd005369
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/pci/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pci/quirks.c:5304:6: warning: no previous prototype for function 'quirk_intel_tbt_supported_link_speeds' [-Wmissing-prototypes]
   void quirk_intel_tbt_supported_link_speeds(struct pci_dev *pdev)
        ^
   drivers/pci/quirks.c:5304:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void quirk_intel_tbt_supported_link_speeds(struct pci_dev *pdev)
   ^
   static 
   1 warning generated.


vim +/quirk_intel_tbt_supported_link_speeds +5304 drivers/pci/quirks.c

  5298	
  5299	/*
  5300	 * Intel Titan Ridge returns incorrect Supported Link Speeds Vector
  5301	 * when max Link Speed is 2.5GT/s. This results in an extra 1s delay during
  5302	 * resume_noirq with pcie tunneling enabled. Override that value:
  5303	 */
> 5304	void quirk_intel_tbt_supported_link_speeds(struct pci_dev *pdev)
  5305	{
  5306		pci_info(pdev, "applying Supported Link Speeds quirk\n");
  5307		pdev->supported_link_speed = PCIE_SPEED_2_5GT;
  5308	}
  5309	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15e7, quirk_intel_tbt_supported_link_speeds);
  5310	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ea, quirk_intel_tbt_supported_link_speeds);
  5311	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ef, quirk_intel_tbt_supported_link_speeds);
  5312	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
kernel test robot Jan. 8, 2022, 2:58 p.m. UTC | #2 
Hi Sanrio,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on helgaas-pci/next]
[also build test WARNING on v5.16-rc8 next-20220107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Sanrio-Alvares/PCI-thunderbolt-Add-quirk-to-handle-incorrect-Supported-Link-Speeds/20220107-064444
base:   https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: riscv-randconfig-s032-20220106 (https://download.01.org/0day-ci/archive/20220108/202201082217.CMkPI5k2-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 11.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.4-dirty
        # https://github.com/0day-ci/linux/commit/98f8f42acd1b8f46f3e6778fa58dd0d1cd005369
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Sanrio-Alvares/PCI-thunderbolt-Add-quirk-to-handle-incorrect-Supported-Link-Speeds/20220107-064444
        git checkout 98f8f42acd1b8f46f3e6778fa58dd0d1cd005369
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=riscv SHELL=/bin/bash drivers/pci/ kernel/bpf/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
   drivers/pci/quirks.c:2323:57: sparse: sparse: restricted pci_power_t degrades to integer
>> drivers/pci/quirks.c:5304:6: sparse: sparse: symbol 'quirk_intel_tbt_supported_link_speeds' was not declared. Should it be static?

vim +/quirk_intel_tbt_supported_link_speeds +5304 drivers/pci/quirks.c

  5298	
  5299	/*
  5300	 * Intel Titan Ridge returns incorrect Supported Link Speeds Vector
  5301	 * when max Link Speed is 2.5GT/s. This results in an extra 1s delay during
  5302	 * resume_noirq with pcie tunneling enabled. Override that value:
  5303	 */
> 5304	void quirk_intel_tbt_supported_link_speeds(struct pci_dev *pdev)
  5305	{
  5306		pci_info(pdev, "applying Supported Link Speeds quirk\n");
  5307		pdev->supported_link_speed = PCIE_SPEED_2_5GT;
  5308	}
  5309	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15e7, quirk_intel_tbt_supported_link_speeds);
  5310	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ea, quirk_intel_tbt_supported_link_speeds);
  5311	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ef, quirk_intel_tbt_supported_link_speeds);
  5312	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff mbox series

Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 3d2fb394986a..92401552d385 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -6136,6 +6136,10 @@  enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev)
 {
 	u32 lnkcap2, lnkcap;
 
+	/* Use overridden value of Supported Link Speed */
+	if (dev->supported_link_speed)
+		return dev->supported_link_speed;
+
 	/*
 	 * Link Capabilities 2 was added in PCIe r3.0, sec 7.8.18.  The
 	 * implementation note there recommends using the Supported Link
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 003950c738d2..f1c11a3bb56c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5293,6 +5293,20 @@  static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443, quirk_intel_qat_vf_cap);
 
+/*
+ * Intel Titan Ridge returns incorrect Supported Link Speeds Vector
+ * when max Link Speed is 2.5GT/s. This results in an extra 1s delay during
+ * resume_noirq with pcie tunneling enabled. Override that value:
+ */
+void quirk_intel_tbt_supported_link_speeds(struct pci_dev *pdev)
+{
+	pci_info(pdev, "applying Supported Link Speeds quirk\n");
+	pdev->supported_link_speed = PCIE_SPEED_2_5GT;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15e7, quirk_intel_tbt_supported_link_speeds);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ea, quirk_intel_tbt_supported_link_speeds);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ef, quirk_intel_tbt_supported_link_speeds);
+
 /*
  * FLR may cause the following to devices to hang:
  *
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 18a75c8e615c..633e81e9fe3b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -502,6 +502,7 @@  struct pci_dev {
 	struct pci_p2pdma __rcu *p2pdma;
 #endif
 	u16		acs_cap;	/* ACS Capability offset */
+	u8		supported_link_speed; /* Override Supported Link Speed value from device */
 	phys_addr_t	rom;		/* Physical address if not from BAR */
 	size_t		romlen;		/* Length if not from BAR */
 	char		*driver_override; /* Driver name to force a match */