| Message ID | 20220119002438.106079-4-sean.anderson@seco.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | usb: dwc3: Calculate REFCLKPER et. al. from reference clock | expand |
On Tue, 2022-01-18 at 19:24 -0500, Sean Anderson wrote: > Instead of using a special property to determine the reference clock > period, use the rate of the reference clock. When we have a legacy > snps,ref-clock-period-ns property and no reference clock, use it > instead. Fractional clocks are not currently supported, and will be > dealt with in the next commit. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > (no changes since v1) > > drivers/usb/dwc3/core.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index 699ab9abdc47..5214daceda86 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -348,13 +348,22 @@ static void dwc3_frame_length_adjustment(struct dwc3 > *dwc) > static void dwc3_ref_clk_period(struct dwc3 *dwc) > { > u32 reg; > + unsigned long rate, period; > > - if (dwc->ref_clk_per == 0) > + if (dwc->ref_clk) { > + rate = clk_get_rate(dwc->ref_clk); > + if (!rate) > + return; > + period = NSEC_PER_SEC / rate; > + } else if (dwc->ref_clk_per) { > + period = dwc->ref_clk_per; > + } else { > return; > + } > > reg = dwc3_readl(dwc->regs, DWC3_GUCTL); > reg &= ~DWC3_GUCTL_REFCLKPER_MASK; > - reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, dwc->ref_clk_per); > + reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period); > dwc3_writel(dwc->regs, DWC3_GUCTL, reg); > } > Looks good here on a ZynqMP board. Reviewed-by: Robert Hancock <robert.hancock@calian.com> Tested-by: Robert Hancock <robert.hancock@calian.com>
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 699ab9abdc47..5214daceda86 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -348,13 +348,22 @@ static void dwc3_frame_length_adjustment(struct dwc3 *dwc) static void dwc3_ref_clk_period(struct dwc3 *dwc) { u32 reg; + unsigned long rate, period; - if (dwc->ref_clk_per == 0) + if (dwc->ref_clk) { + rate = clk_get_rate(dwc->ref_clk); + if (!rate) + return; + period = NSEC_PER_SEC / rate; + } else if (dwc->ref_clk_per) { + period = dwc->ref_clk_per; + } else { return; + } reg = dwc3_readl(dwc->regs, DWC3_GUCTL); reg &= ~DWC3_GUCTL_REFCLKPER_MASK; - reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, dwc->ref_clk_per); + reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period); dwc3_writel(dwc->regs, DWC3_GUCTL, reg); }
Instead of using a special property to determine the reference clock period, use the rate of the reference clock. When we have a legacy snps,ref-clock-period-ns property and no reference clock, use it instead. Fractional clocks are not currently supported, and will be dealt with in the next commit. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- (no changes since v1) drivers/usb/dwc3/core.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)