| Message ID | 20220110134659.30424-13-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | RFC |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add new Renesas RZ/V2L SoC and Renesas RZ/V2L SMARC EVK support | expand |
Hi Prabhakar, Biju, On Mon, Jan 10, 2022 at 2:47 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/Makefile > +++ b/arch/arm64/boot/dts/renesas/Makefile > @@ -77,4 +77,6 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb > > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb > +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c1-smarc.dtb Please preserve sort order, and add a blank line to separate different SoCs. > dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb > +dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l1-smarc.dtb Sort order. Given this patch adds boards with two different SoCs, and the two DTS files are quite dissimilar, I think this patch should be split in two parts. > --- /dev/null > +++ b/arch/arm64/boot/dts/renesas/r9a07g044c1-smarc.dts > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +/* > + * Device Tree Source for the RZ/G2LC SMARC EVK board > + * > + * Copyright (C) 2021 Renesas Electronics Corp. > + */ > + > +/dts-v1/; > +#include "r9a07g044c1.dtsi" > +#include "rzg2lc-smarc-som.dtsi" > +#include "rzg2lc-smarc-pinfunction.dtsi" > +#include "rzg2l-smarc.dtsi" > + > +/ { > + model = "Renesas SMARC EVK based on r9a07g044c2"; > + compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044"; "renesas,r9a07g044c1" > + > +}; > + > +&canfd { > + /delete-property/ pinctrl-0; > + status = "disabled"; > +}; Looks like the corresponding pinctrl-names properties should be removed, too. Else "make dtbs_check" complains. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Ouch please ignore this patch. Now I know where I missed the v2 combining "[PATCH 01/16] dt-bindings: arm: renesas: Document Renesas RZ/V2L SoC" and "[PATCH 02/16] dt-bindings: arm: renesas: Document SMARC EVK". I picked a wrong commit-id vehicle sending a v2! This patch is intended for internal build testing atm. We are yet to test r9a07g044c1/r9a07g054l1 on actual HW. Sorry about the inconvenience. Cheers, Prabhakar On Fri, Jan 21, 2022 at 2:47 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, Biju, > > On Mon, Jan 10, 2022 at 2:47 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > From: Biju Das <biju.das.jz@bp.renesas.com> > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/Makefile > > +++ b/arch/arm64/boot/dts/renesas/Makefile > > @@ -77,4 +77,6 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb > > > > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb > > dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb > > +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c1-smarc.dtb > > Please preserve sort order, and add a blank line to separate > different SoCs. > > > dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb > > +dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l1-smarc.dtb > > Sort order. > > Given this patch adds boards with two different SoCs, and the two > DTS files are quite dissimilar, I think this patch should be split in > two parts. > > > --- /dev/null > > +++ b/arch/arm64/boot/dts/renesas/r9a07g044c1-smarc.dts > > @@ -0,0 +1,99 @@ > > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +/* > > + * Device Tree Source for the RZ/G2LC SMARC EVK board > > + * > > + * Copyright (C) 2021 Renesas Electronics Corp. > > + */ > > + > > +/dts-v1/; > > +#include "r9a07g044c1.dtsi" > > +#include "rzg2lc-smarc-som.dtsi" > > +#include "rzg2lc-smarc-pinfunction.dtsi" > > +#include "rzg2l-smarc.dtsi" > > + > > +/ { > > + model = "Renesas SMARC EVK based on r9a07g044c2"; > > + compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044"; > > "renesas,r9a07g044c1" > > > + > > +}; > > + > > +&canfd { > > + /delete-property/ pinctrl-0; > > + status = "disabled"; > > +}; > > Looks like the corresponding pinctrl-names properties should be > removed, too. Else "make dtbs_check" complains. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 2daba38d1161..8de5561a3902 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -77,4 +77,6 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c1-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb +dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l1-smarc.dtb diff --git a/arch/arm64/boot/dts/renesas/r9a07g044c1-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044c1-smarc.dts new file mode 100644 index 000000000000..43af14ef0103 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a07g044c1-smarc.dts @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/G2LC SMARC EVK board + * + * Copyright (C) 2021 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r9a07g044c1.dtsi" +#include "rzg2lc-smarc-som.dtsi" +#include "rzg2lc-smarc-pinfunction.dtsi" +#include "rzg2l-smarc.dtsi" + +/ { + model = "Renesas SMARC EVK based on r9a07g044c2"; + compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044"; + +}; + +&canfd { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&ehci0 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&ehci1 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&hsusb { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&i2c0 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&i2c1 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&i2c3 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&ohci0 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&ohci1 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&phyrst { + status = "disabled"; +}; + +&scif2 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&sdhi1 { + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-1; + /delete-property/ vmmc-supply; + status = "disabled"; +}; + +&spi1 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&ssi0 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&usb2_phy0 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; + +&usb2_phy1 { + /delete-property/ pinctrl-0; + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l1-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g054l1-smarc.dts new file mode 100644 index 000000000000..2d9d397cef06 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a07g054l1-smarc.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/G2L SMARC EVK board + * + * Copyright (C) 2021 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r9a07g054l1.dtsi" +#include "rzg2l-smarc-som.dtsi" +#include "rzg2l-smarc-pinfunction.dtsi" +#include "rzg2l-smarc.dtsi" + +/ { + model = "Renesas SMARC EVK based on r9a07g054l1"; + compatible = "renesas,smarc-evk", "renesas,r9a07g054l1", "renesas,r9a07g054"; +}; + +&pinctrl { + /delete-node/ can0-stb; + /delete-node/ can1-stb; + /delete-node/ gpio-sd0-pwr-en-hog; + /delete-node/ sd0-dev-sel-hog; + /delete-node/ sd1-pwr-en-hog; +};