Message ID | 2cd67f7eee96e062ea479b7406799f7a2daa5b1b.1642482334.git.quic_saipraka@quicinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | lib/rwmmio/arm64: Add support to trace register reads/writes | expand |
On Mon, 24 Jan 2022 06:33:31 +0000, Sai Prakash Ranjan <quic_saipraka@quicinc.com> wrote: > > Fix -Woverflow warnings for tegra irqchip driver which is a result > of moving arm64 custom MMIO accessor macros to asm-generic function > implementations giving a bonus type-checking now and uncovering these > overflow warnings. > > drivers/irqchip/irq-tegra.c: In function ‘tegra_ictlr_suspend’: > drivers/irqchip/irq-tegra.c:151:18: warning: large integer implicitly truncated to unsigned type [-Woverflow] > writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); > ^ > > Cc: Marc Zyngier <maz@kernel.org> > Reviewed-by: Arnd Bergmann <arnd@arndb.de> > Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> > --- > drivers/irqchip/irq-tegra.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c > index e1f771c72fc4..9e4e5b39c701 100644 > --- a/drivers/irqchip/irq-tegra.c > +++ b/drivers/irqchip/irq-tegra.c > @@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void) > lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS); > > /* Disable COP interrupts */ > - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); > + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); Aside from the 'l' in writel really meaning 'long' (a historical artefact), it would probably be better to lift the ambiguity entirely and write this as GENMASK(31, 0), making it clear what is being set, no matter what the revision of the architecture is (this driver also works on 32bit machines). Thanks, M.
On 1/25/2022 3:00 PM, Marc Zyngier wrote: > On Mon, 24 Jan 2022 06:33:31 +0000, > Sai Prakash Ranjan <quic_saipraka@quicinc.com> wrote: >> Fix -Woverflow warnings for tegra irqchip driver which is a result >> of moving arm64 custom MMIO accessor macros to asm-generic function >> implementations giving a bonus type-checking now and uncovering these >> overflow warnings. >> >> drivers/irqchip/irq-tegra.c: In function ‘tegra_ictlr_suspend’: >> drivers/irqchip/irq-tegra.c:151:18: warning: large integer implicitly truncated to unsigned type [-Woverflow] >> writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); >> ^ >> >> Cc: Marc Zyngier <maz@kernel.org> >> Reviewed-by: Arnd Bergmann <arnd@arndb.de> >> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> >> --- >> drivers/irqchip/irq-tegra.c | 10 +++++----- >> 1 file changed, 5 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c >> index e1f771c72fc4..9e4e5b39c701 100644 >> --- a/drivers/irqchip/irq-tegra.c >> +++ b/drivers/irqchip/irq-tegra.c >> @@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void) >> lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS); >> >> /* Disable COP interrupts */ >> - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); >> + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); > Aside from the 'l' in writel really meaning 'long' (a historical > artefact), it would probably be better to lift the ambiguity entirely > and write this as GENMASK(31, 0), making it clear what is being set, > no matter what the revision of the architecture is (this driver also > works on 32bit machines). > Sure, I will make this change. Thanks, Sai
diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c index e1f771c72fc4..9e4e5b39c701 100644 --- a/drivers/irqchip/irq-tegra.c +++ b/drivers/irqchip/irq-tegra.c @@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void) lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS); /* Disable COP interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); /* Disable CPU interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); /* Enable the wakeup sources of ictlr */ writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET); @@ -172,12 +172,12 @@ static void tegra_ictlr_resume(void) writel_relaxed(lic->cpu_iep[i], ictlr + ICTLR_CPU_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); writel_relaxed(lic->cpu_ier[i], ictlr + ICTLR_CPU_IER_SET); writel_relaxed(lic->cop_iep[i], ictlr + ICTLR_COP_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); writel_relaxed(lic->cop_ier[i], ictlr + ICTLR_COP_IER_SET); } @@ -312,7 +312,7 @@ static int __init tegra_ictlr_init(struct device_node *node, lic->base[i] = base; /* Disable all interrupts */ - writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR); + writel_relaxed(~0U, base + ICTLR_CPU_IER_CLR); /* All interrupts target IRQ */ writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS);