diff mbox series

pinctrl: microchip-sgpio: Fix support for regmap

Message ID 20220125161245.418882-1-horatiu.vultur@microchip.com (mailing list archive)
State New, archived
Headers show
Series pinctrl: microchip-sgpio: Fix support for regmap | expand

Commit Message

Horatiu Vultur Jan. 25, 2022, 4:12 p.m. UTC
Initially the driver accessed the registers using u32 __iomem but then
in the blamed commit it changed it to use regmap. The problem is that now
the offset of the registers is not calculated anymore at word offset but
at byte offset. Therefore make sure to multiply the offset with word size.

Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
 drivers/pinctrl/pinctrl-microchip-sgpio.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

Comments

Colin Foster Jan. 25, 2022, 4:46 p.m. UTC | #1
Hi Horatiu,

On Tue, Jan 25, 2022 at 05:12:45PM +0100, Horatiu Vultur wrote:
> Initially the driver accessed the registers using u32 __iomem but then
> in the blamed commit it changed it to use regmap. The problem is that now
> the offset of the registers is not calculated anymore at word offset but
> at byte offset. Therefore make sure to multiply the offset with word size.
> 

Sorry about this one. I see it must have slipped through the cracks
because I had made the same change in my tree. The only difference is I
had copied reg_stride into sgpio_priv instead of making regmap_config
file-scope. For what its worth, with apologies:

Reviewed-by: Colin Foster <colin.foster@in-advantage.com>

> Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
> ---
>  drivers/pinctrl/pinctrl-microchip-sgpio.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
> index 8e081c90bdb2..2999c98bbdee 100644
> --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
> +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
> @@ -98,6 +98,12 @@ static const struct sgpio_properties properties_sparx5 = {
>  	.regoff = { 0x00, 0x06, 0x26, 0x04, 0x05, 0x2a, 0x32, 0x3a, 0x3e, 0x42 },
>  };
>  
> +static const struct regmap_config regmap_config = {
> +		.reg_bits = 32,
> +		.val_bits = 32,
> +		.reg_stride = 4,
> +};
> +
>  static const char * const functions[] = { "gpio" };
>  
>  struct sgpio_bank {
> @@ -137,7 +143,7 @@ static inline int sgpio_addr_to_pin(struct sgpio_priv *priv, int port, int bit)
>  
>  static inline u32 sgpio_get_addr(struct sgpio_priv *priv, u32 rno, u32 off)
>  {
> -	return priv->properties->regoff[rno] + off;
> +	return (priv->properties->regoff[rno] + off) * regmap_config.reg_stride;
>  }
>  
>  static u32 sgpio_readl(struct sgpio_priv *priv, u32 rno, u32 off)
> @@ -821,11 +827,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev)
>  	struct clk *clk;
>  	u32 __iomem *regs;
>  	u32 val;
> -	struct regmap_config regmap_config = {
> -		.reg_bits = 32,
> -		.val_bits = 32,
> -		.reg_stride = 4,
> -	};
>  
>  	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>  	if (!priv)
> -- 
> 2.33.0
>
Horatiu Vultur Jan. 27, 2022, 10:40 a.m. UTC | #2
The 01/25/2022 08:46, Colin Foster wrote:
> 
> Hi Horatiu,

Hi Colin,

> 
> On Tue, Jan 25, 2022 at 05:12:45PM +0100, Horatiu Vultur wrote:
> > Initially the driver accessed the registers using u32 __iomem but then
> > in the blamed commit it changed it to use regmap. The problem is that now
> > the offset of the registers is not calculated anymore at word offset but
> > at byte offset. Therefore make sure to multiply the offset with word size.
> >
> 
> Sorry about this one. I see it must have slipped through the cracks
> because I had made the same change in my tree. The only difference is I
> had copied reg_stride into sgpio_priv instead of making regmap_config
> file-scope. For what its worth, with apologies:

No worries, sorry that I missed your patch initially. And thanks for
reviewing this patch.

> 
> Reviewed-by: Colin Foster <colin.foster@in-advantage.com>



> 
> > Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap")
> > Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
> > ---
> >  drivers/pinctrl/pinctrl-microchip-sgpio.c | 13 +++++++------
> >  1 file changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
> > index 8e081c90bdb2..2999c98bbdee 100644
> > --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
> > +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
> > @@ -98,6 +98,12 @@ static const struct sgpio_properties properties_sparx5 = {
> >       .regoff = { 0x00, 0x06, 0x26, 0x04, 0x05, 0x2a, 0x32, 0x3a, 0x3e, 0x42 },
> >  };
> >
> > +static const struct regmap_config regmap_config = {
> > +             .reg_bits = 32,
> > +             .val_bits = 32,
> > +             .reg_stride = 4,
> > +};
> > +
> >  static const char * const functions[] = { "gpio" };
> >
> >  struct sgpio_bank {
> > @@ -137,7 +143,7 @@ static inline int sgpio_addr_to_pin(struct sgpio_priv *priv, int port, int bit)
> >
> >  static inline u32 sgpio_get_addr(struct sgpio_priv *priv, u32 rno, u32 off)
> >  {
> > -     return priv->properties->regoff[rno] + off;
> > +     return (priv->properties->regoff[rno] + off) * regmap_config.reg_stride;
> >  }
> >
> >  static u32 sgpio_readl(struct sgpio_priv *priv, u32 rno, u32 off)
> > @@ -821,11 +827,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev)
> >       struct clk *clk;
> >       u32 __iomem *regs;
> >       u32 val;
> > -     struct regmap_config regmap_config = {
> > -             .reg_bits = 32,
> > -             .val_bits = 32,
> > -             .reg_stride = 4,
> > -     };
> >
> >       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> >       if (!priv)
> > --
> > 2.33.0
> >
Steen Hegelund Jan. 27, 2022, 12:42 p.m. UTC | #3
Good catch Horatiu.

BR
Steen

Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com>

On Tue, 2022-01-25 at 17:12 +0100, Horatiu Vultur wrote:
> Initially the driver accessed the registers using u32 __iomem but then
> in the blamed commit it changed it to use regmap. The problem is that now
> the offset of the registers is not calculated anymore at word offset but
> at byte offset. Therefore make sure to multiply the offset with word size.
> 
> Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
> ---
...
Andy Shevchenko Jan. 28, 2022, 2:19 p.m. UTC | #4
On Wed, Jan 26, 2022 at 3:19 AM Colin Foster
<colin.foster@in-advantage.com> wrote:
> On Tue, Jan 25, 2022 at 05:12:45PM +0100, Horatiu Vultur wrote:

> The only difference is I
> had copied reg_stride into sgpio_priv instead of making regmap_config
> file-scope.

I'm wondering if we may access config via a pointer to regmap.
Colin Foster Jan. 28, 2022, 9:32 p.m. UTC | #5
On Fri, Jan 28, 2022 at 04:19:12PM +0200, Andy Shevchenko wrote:
> On Wed, Jan 26, 2022 at 3:19 AM Colin Foster
> <colin.foster@in-advantage.com> wrote:
> > On Tue, Jan 25, 2022 at 05:12:45PM +0100, Horatiu Vultur wrote:
> 
> > The only difference is I
> > had copied reg_stride into sgpio_priv instead of making regmap_config
> > file-scope.
> 
> I'm wondering if we may access config via a pointer to regmap.

Ooh... regmap_get_reg_stride() exists. I didn't see that before. That
seems like it is the answer.

I don't know the etiquette here. Ask Horatiu to re-submit, or me send
along a v2, or something else.

> 
> -- 
> With Best Regards,
> Andy Shevchenko
diff mbox series

Patch

diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index 8e081c90bdb2..2999c98bbdee 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -98,6 +98,12 @@  static const struct sgpio_properties properties_sparx5 = {
 	.regoff = { 0x00, 0x06, 0x26, 0x04, 0x05, 0x2a, 0x32, 0x3a, 0x3e, 0x42 },
 };
 
+static const struct regmap_config regmap_config = {
+		.reg_bits = 32,
+		.val_bits = 32,
+		.reg_stride = 4,
+};
+
 static const char * const functions[] = { "gpio" };
 
 struct sgpio_bank {
@@ -137,7 +143,7 @@  static inline int sgpio_addr_to_pin(struct sgpio_priv *priv, int port, int bit)
 
 static inline u32 sgpio_get_addr(struct sgpio_priv *priv, u32 rno, u32 off)
 {
-	return priv->properties->regoff[rno] + off;
+	return (priv->properties->regoff[rno] + off) * regmap_config.reg_stride;
 }
 
 static u32 sgpio_readl(struct sgpio_priv *priv, u32 rno, u32 off)
@@ -821,11 +827,6 @@  static int microchip_sgpio_probe(struct platform_device *pdev)
 	struct clk *clk;
 	u32 __iomem *regs;
 	u32 val;
-	struct regmap_config regmap_config = {
-		.reg_bits = 32,
-		.val_bits = 32,
-		.reg_stride = 4,
-	};
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)