| Message ID | 20220205162144.30240-8-vidyas@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: tegra: Add Tegra234 PCIe support | expand |
On 05/02/2022 17:21, Vidya Sagar wrote: > Enable PCIe controller nodes to enable respective PCIe slots on > P3737-0000 board. Following is the ownership of slots by different > PCIe controllers. > Controller-1 : On-board Broadcom WiFi controller > Controller-4 : M.2 Key-M slot > Controller-5 : CEM form-factor x8 slot > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > index efbbb878ba5a..b819e1133bc4 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > @@ -21,4 +21,30 @@ > serial { > status = "okay"; > }; > + > + pcie@14100000 { > + status = "okay"; > + > + phys = <&p2u_hsio_3>; > + phy-names = "p2u-0"; > + }; > + > + pcie@14160000 { > + status = "okay"; > + > + phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, > + <&p2u_hsio_7>; > + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; > + }; > + > + pcie@141a0000 { > + status = "okay"; > + > + phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, > + <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, > + <&p2u_nvhs_6>, <&p2u_nvhs_7>; > + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", > + "p2u-5", "p2u-6", "p2u-7"; > + }; > + No need for trailing new line. > }; Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts index efbbb878ba5a..b819e1133bc4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts @@ -21,4 +21,30 @@ serial { status = "okay"; }; + + pcie@14100000 { + status = "okay"; + + phys = <&p2u_hsio_3>; + phy-names = "p2u-0"; + }; + + pcie@14160000 { + status = "okay"; + + phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, + <&p2u_hsio_7>; + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; + }; + + pcie@141a0000 { + status = "okay"; + + phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, + <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, + <&p2u_nvhs_6>, <&p2u_nvhs_7>; + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", + "p2u-5", "p2u-6", "p2u-7"; + }; + };
Enable PCIe controller nodes to enable respective PCIe slots on P3737-0000 board. Following is the ownership of slots by different PCIe controllers. Controller-1 : On-board Broadcom WiFi controller Controller-4 : M.2 Key-M slot Controller-5 : CEM form-factor x8 slot Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+)