| Message ID | 20211202075105.195664-11-avolmat@me.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: sti: various DT fixes to avoid warnings | expand |
Hi Alain On 12/2/21 08:51, Alain Volmat wrote: > Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section. > Since they are controlled via syscfg, there is no reg property needed, > which is required when having the node within the soc section. > > Signed-off-by: Alain Volmat <avolmat@me.com> > --- > arch/arm/boot/dts/stih418.dtsi | 38 ++++++++++++++++------------------ > 1 file changed, 18 insertions(+), 20 deletions(-) > > diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi > index 97eda4392fbe..b35b9b7a7ccc 100644 > --- a/arch/arm/boot/dts/stih418.dtsi > +++ b/arch/arm/boot/dts/stih418.dtsi > @@ -26,31 +26,29 @@ cpu@3 { > }; > }; > > + usb2_picophy1: phy2 { > + compatible = "st,stih407-usb2-phy"; > + #phy-cells = <0>; > + st,syscfg = <&syscfg_core 0xf8 0xf4>; > + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > + <&picophyreset STIH407_PICOPHY0_RESET>; > + reset-names = "global", "port"; > + }; > + > + usb2_picophy2: phy3 { > + compatible = "st,stih407-usb2-phy"; > + #phy-cells = <0>; > + st,syscfg = <&syscfg_core 0xfc 0xf4>; > + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > + <&picophyreset STIH407_PICOPHY1_RESET>; > + reset-names = "global", "port"; > + }; > + > soc { > rng11: rng@8a8a000 { > status = "disabled"; > }; > > - usb2_picophy1: phy2@0 { > - compatible = "st,stih407-usb2-phy"; > - reg = <0 0>; > - #phy-cells = <0>; > - st,syscfg = <&syscfg_core 0xf8 0xf4>; > - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > - <&picophyreset STIH407_PICOPHY0_RESET>; > - reset-names = "global", "port"; > - }; > - > - usb2_picophy2: phy3@0 { > - compatible = "st,stih407-usb2-phy"; > - reg = <0 0>; > - #phy-cells = <0>; > - st,syscfg = <&syscfg_core 0xfc 0xf4>; > - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, > - <&picophyreset STIH407_PICOPHY1_RESET>; > - reset-names = "global", "port"; > - }; > - > ohci0: usb@9a03c00 { > compatible = "st,st-ohci-300x"; > reg = <0x9a03c00 0x100>; Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi index 97eda4392fbe..b35b9b7a7ccc 100644 --- a/arch/arm/boot/dts/stih418.dtsi +++ b/arch/arm/boot/dts/stih418.dtsi @@ -26,31 +26,29 @@ cpu@3 { }; }; + usb2_picophy1: phy2 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xf8 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + }; + + usb2_picophy2: phy3 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xfc 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY1_RESET>; + reset-names = "global", "port"; + }; + soc { rng11: rng@8a8a000 { status = "disabled"; }; - usb2_picophy1: phy2@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xf8 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY0_RESET>; - reset-names = "global", "port"; - }; - - usb2_picophy2: phy3@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xfc 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY1_RESET>; - reset-names = "global", "port"; - }; - ohci0: usb@9a03c00 { compatible = "st,st-ohci-300x"; reg = <0x9a03c00 0x100>;
Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section. Since they are controlled via syscfg, there is no reg property needed, which is required when having the node within the soc section. Signed-off-by: Alain Volmat <avolmat@me.com> --- arch/arm/boot/dts/stih418.dtsi | 38 ++++++++++++++++------------------ 1 file changed, 18 insertions(+), 20 deletions(-)