diff mbox series

[1/2] dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator

Message ID 20220213173310.152230-1-marex@denx.de (mailing list archive)
State Changes Requested, archived
Headers show
Series [1/2] dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator | expand

Commit Message

Marek Vasut Feb. 13, 2022, 5:33 p.m. UTC 
Add binding for Renesas 9-series PCIe clock generators. This binding
is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C
PCIe clock generators, currently the only tested and supported chip
is 9FGV0241.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org
To: linux-clk@vger.kernel.org
---
 .../bindings/clock/renesas,9series.yaml       | 102 ++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,9series.yaml

Comments

Stephen Boyd Feb. 17, 2022, 11:39 p.m. UTC | #1 
Quoting Marek Vasut (2022-02-13 09:33:09)
> diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> new file mode 100644
> index 0000000000000..774053748d9f0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> @@ -0,0 +1,102 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/renesas,9series.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Binding for Renesas 9-series I2C PCIe clock generators
> +
> +description: |
> +  The Renesas 9-series are I2C PCIe clock generators providing
> +  from 1 to 20 output clocks.
> +
> +  When referencing the provided clock in the DT using phandle
> +  and clock specifier, the following mapping applies:
> +
> +  - 9FGV0241:
> +    0 -- DIF0
> +    1 -- DIF1
> +
> +maintainers:
> +  - Marek Vasut <marex@denx.de>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - renesas,9fgv0241
> +
> +  reg:
> +    description: I2C device address
> +    enum: [ 0x68, 0x6a ]
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  clocks:
> +    items:
> +      - description: XTal input clock
> +
> +  renesas,out-amplitude:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [ 600000, 700000, 800000, 900000 ]
> +    description: Output clock signal amplitude in uV
> +
> +  renesas,out-spread-spectrum:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [ 100000, 99750, 99500 ]
> +    description: Output clock down spread in pcm
> +
> +patternProperties:
> +  "^DIF[0-19]$":
> +    type: object
> +    description:
> +      Description of one of the outputs (DIF0..DIF19).
> +    properties:
> +      renesas,slew-rate:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        enum: [ 2000000, 3000000 ]
> +        description: Output clock slew rate select in V/ns
> +    additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'

Can it operate without an input xtal?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    /* 25MHz reference crystal */
> +    ref25: ref25m {
> +        compatible = "fixed-clock";
> +        #clock-cells = <0>;
> +        clock-frequency = <25000000>;
> +    };
> +
> +    i2c@0 {
> +        reg = <0x0 0x100>;
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        rs9: clock-generator@6a {
> +            compatible = "renesas,9fgv0241";
> +            reg = <0x6a>;
> +            #clock-cells = <1>;
> +
> +            clocks = <&ref25m>;
> +
> +            DIF0 {
> +                renesas,slew-rate = <3000000>;
> +            };
> +        };
> +    };
> +
> +    /* Consumer referencing the 9FGV0241 pin DIF0 */

Consumers are typically left out of clk bindings.

> +    consumer {
> +        /* ... */
> +        clocks = <&rs9 0>;
> +        /* ... */
> +    };
> +
> +...
> -- 
> 2.34.1
>
Marek Vasut Feb. 18, 2022, 1:09 a.m. UTC | #2 
On 2/18/22 00:39, Stephen Boyd wrote:
> Quoting Marek Vasut (2022-02-13 09:33:09)
>> diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
>> new file mode 100644
>> index 0000000000000..774053748d9f0
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
>> @@ -0,0 +1,102 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/renesas,9series.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Binding for Renesas 9-series I2C PCIe clock generators
>> +
>> +description: |
>> +  The Renesas 9-series are I2C PCIe clock generators providing
>> +  from 1 to 20 output clocks.
>> +
>> +  When referencing the provided clock in the DT using phandle
>> +  and clock specifier, the following mapping applies:
>> +
>> +  - 9FGV0241:
>> +    0 -- DIF0
>> +    1 -- DIF1
>> +
>> +maintainers:
>> +  - Marek Vasut <marex@denx.de>
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - renesas,9fgv0241
>> +
>> +  reg:
>> +    description: I2C device address
>> +    enum: [ 0x68, 0x6a ]
>> +
>> +  '#clock-cells':
>> +    const: 1
>> +
>> +  clocks:
>> +    items:
>> +      - description: XTal input clock
>> +
>> +  renesas,out-amplitude:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    enum: [ 600000, 700000, 800000, 900000 ]
>> +    description: Output clock signal amplitude in uV
>> +
>> +  renesas,out-spread-spectrum:
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    enum: [ 100000, 99750, 99500 ]
>> +    description: Output clock down spread in pcm
>> +
>> +patternProperties:
>> +  "^DIF[0-19]$":
>> +    type: object
>> +    description:
>> +      Description of one of the outputs (DIF0..DIF19).
>> +    properties:
>> +      renesas,slew-rate:
>> +        $ref: /schemas/types.yaml#/definitions/uint32
>> +        enum: [ 2000000, 3000000 ]
>> +        description: Output clock slew rate select in V/ns
>> +    additionalProperties: false
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - '#clock-cells'
> 
> Can it operate without an input xtal?

Not to my knowledge.

[...]
Stephen Boyd Feb. 18, 2022, 1:28 a.m. UTC | #3 
Quoting Marek Vasut (2022-02-17 17:09:26)
> On 2/18/22 00:39, Stephen Boyd wrote:
> > Quoting Marek Vasut (2022-02-13 09:33:09)
> >> diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> >> new file mode 100644
> >> index 0000000000000..774053748d9f0
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> >> @@ -0,0 +1,102 @@
> >> +required:
> >> +  - compatible
> >> +  - reg
> >> +  - '#clock-cells'
> > 
> > Can it operate without an input xtal?
> 
> Not to my knowledge.
> 

Ok please make it required property then.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
new file mode 100644
index 0000000000000..774053748d9f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
@@ -0,0 +1,102 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/renesas,9series.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Binding for Renesas 9-series I2C PCIe clock generators
+
+description: |
+  The Renesas 9-series are I2C PCIe clock generators providing
+  from 1 to 20 output clocks.
+
+  When referencing the provided clock in the DT using phandle
+  and clock specifier, the following mapping applies:
+
+  - 9FGV0241:
+    0 -- DIF0
+    1 -- DIF1
+
+maintainers:
+  - Marek Vasut <marex@denx.de>
+
+properties:
+  compatible:
+    enum:
+      - renesas,9fgv0241
+
+  reg:
+    description: I2C device address
+    enum: [ 0x68, 0x6a ]
+
+  '#clock-cells':
+    const: 1
+
+  clocks:
+    items:
+      - description: XTal input clock
+
+  renesas,out-amplitude:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 600000, 700000, 800000, 900000 ]
+    description: Output clock signal amplitude in uV
+
+  renesas,out-spread-spectrum:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 100000, 99750, 99500 ]
+    description: Output clock down spread in pcm
+
+patternProperties:
+  "^DIF[0-19]$":
+    type: object
+    description:
+      Description of one of the outputs (DIF0..DIF19).
+    properties:
+      renesas,slew-rate:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        enum: [ 2000000, 3000000 ]
+        description: Output clock slew rate select in V/ns
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    /* 25MHz reference crystal */
+    ref25: ref25m {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <25000000>;
+    };
+
+    i2c@0 {
+        reg = <0x0 0x100>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        rs9: clock-generator@6a {
+            compatible = "renesas,9fgv0241";
+            reg = <0x6a>;
+            #clock-cells = <1>;
+
+            clocks = <&ref25m>;
+
+            DIF0 {
+                renesas,slew-rate = <3000000>;
+            };
+        };
+    };
+
+    /* Consumer referencing the 9FGV0241 pin DIF0 */
+    consumer {
+        /* ... */
+        clocks = <&rs9 0>;
+        /* ... */
+    };
+
+...