| Message ID | 2f419ed2-66b8-4098-7cd3-0fe698d341c9@omp.ru (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | sh: avoid using IRQ0 on SH3/4 | expand |
On 2/11/22 11:15 PM, Sergey Shtylyov wrote: > Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) > and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify > that code to start the IRQ #s from 16 instead. > > [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ > > Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> > > --- > The patch is against Linus Torvalds' 'linux.git' repo. > > arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- > include/linux/sh_intc.h | 6 +++--- > 2 files changed, 5 insertions(+), 5 deletions(-) > > Index: linux/arch/sh/kernel/cpu/sh3/entry.S > =================================================================== > --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S > +++ linux/arch/sh/kernel/cpu/sh3/entry.S > @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) > mov r4, r0 ! save vector->jmp table offset for later > > shlr2 r4 ! vector to IRQ# conversion > - add #-0x10, r4 > > - cmp/pz r4 ! is it a valid IRQ? > + mov #0x10, r5 > + cmp/ge r5, r4 ! is it a valid IRQ? Maybe I should've used cmp/hs... my 1st try at SH assembly! :-) [...] MBR, Sergey
Hi Sergey! On 2/11/22 21:28, Sergey Shtylyov wrote: > On 2/11/22 11:15 PM, Sergey Shtylyov wrote: > >> Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) >> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify >> that code to start the IRQ #s from 16 instead. >> >> [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ >> >> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> >> >> --- >> The patch is against Linus Torvalds' 'linux.git' repo. >> >> arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- >> include/linux/sh_intc.h | 6 +++--- >> 2 files changed, 5 insertions(+), 5 deletions(-) >> >> Index: linux/arch/sh/kernel/cpu/sh3/entry.S >> =================================================================== >> --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S >> +++ linux/arch/sh/kernel/cpu/sh3/entry.S >> @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) >> mov r4, r0 ! save vector->jmp table offset for later >> >> shlr2 r4 ! vector to IRQ# conversion >> - add #-0x10, r4 >> >> - cmp/pz r4 ! is it a valid IRQ? >> + mov #0x10, r5 >> + cmp/ge r5, r4 ! is it a valid IRQ? > > Maybe I should've used cmp/hs... my 1st try at SH assembly! :-) I can test your revised patch next week on my SH7785LCR. Thanks, Adrian
On 2/11/22 11:30 PM, John Paul Adrian Glaubitz wrote: [...] >>> Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) >>> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify >>> that code to start the IRQ #s from 16 instead. >>> >>> [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ >>> >>> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> >>> >>> --- >>> The patch is against Linus Torvalds' 'linux.git' repo. >>> >>> arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- >>> include/linux/sh_intc.h | 6 +++--- >>> 2 files changed, 5 insertions(+), 5 deletions(-) >>> >>> Index: linux/arch/sh/kernel/cpu/sh3/entry.S >>> =================================================================== >>> --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S >>> +++ linux/arch/sh/kernel/cpu/sh3/entry.S >>> @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) >>> mov r4, r0 ! save vector->jmp table offset for later >>> >>> shlr2 r4 ! vector to IRQ# conversion >>> - add #-0x10, r4 >>> >>> - cmp/pz r4 ! is it a valid IRQ? >>> + mov #0x10, r5 >>> + cmp/ge r5, r4 ! is it a valid IRQ? >> >> Maybe I should've used cmp/hs... my 1st try at SH assembly! :-) Yeah, cmp/hs seems m ore correct as we don't subtract any more... > I can test your revised patch next week on my SH7785LCR. Please do, although testing on the AP-SH4A* bords would be a bit more interesting, as they actually use IRQ0 for the SMSC911x chip... Maybe you have SH7786 base board, by chance? > Thanks, > Adrian MBR, Sergey
On 2/11/22 21:46, Sergey Shtylyov wrote: >> I can test your revised patch next week on my SH7785LCR. > > Please do, although testing on the AP-SH4A* bords would be a bit more > interesting, as they actually use IRQ0 for the SMSC911x chip... > Maybe you have SH7786 base board, by chance? Unfortunately not. I think Oleg Endo might have one but my memory might be wrong here. I think there was also someone on the J-Core list mentioning he had an Alpha Project board [1], but I don't remember which one. Adrian > [1] https://www.apnet.co.jp/product/superh/
On 2/11/22 11:46 PM, Sergey Shtylyov wrote: [...] >>>> Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) >>>> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify >>>> that code to start the IRQ #s from 16 instead. >>>> >>>> [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ >>>> >>>> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> >>>> >>>> --- >>>> The patch is against Linus Torvalds' 'linux.git' repo. >>>> >>>> arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- >>>> include/linux/sh_intc.h | 6 +++--- >>>> 2 files changed, 5 insertions(+), 5 deletions(-) >>>> >>>> Index: linux/arch/sh/kernel/cpu/sh3/entry.S >>>> =================================================================== >>>> --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S >>>> +++ linux/arch/sh/kernel/cpu/sh3/entry.S >>>> @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) >>>> mov r4, r0 ! save vector->jmp table offset for later >>>> >>>> shlr2 r4 ! vector to IRQ# conversion >>>> - add #-0x10, r4 >>>> >>>> - cmp/pz r4 ! is it a valid IRQ? >>>> + mov #0x10, r5 >>>> + cmp/ge r5, r4 ! is it a valid IRQ? >>> >>> Maybe I should've used cmp/hs... my 1st try at SH assembly! :-) > > Yeah, cmp/hs seems m ore correct as we don't subtract any more... > >> I can test your revised patch next week on my SH7785LCR. > > Please do, although testing on the AP-SH4A* bords would be a bit more > interesting, as they actually use IRQ0 for the SMSC911x chip... So, were you finally able to test it? [...] MBR, Sergey
Hi Sergey! On 2/25/22 20:28, Sergey Shtylyov wrote: >>> I can test your revised patch next week on my SH7785LCR. >> >> Please do, although testing on the AP-SH4A* bords would be a bit more >> interesting, as they actually use IRQ0 for the SMSC911x chip... > > So, were you finally able to test it? Not yet, sorry. Machine is currently offline due to a power outage and I cannot turn it back on remotely, I'm not home until tomorrow. I will be able to test it tomorrow, however. Adrian
Hello! On 2/26/22 11:07 AM, John Paul Adrian Glaubitz wrote: [...] >>>> I can test your revised patch next week on my SH7785LCR. >>> >>> Please do, although testing on the AP-SH4A* bords would be a bit more >>> interesting, as they actually use IRQ0 for the SMSC911x chip... >> >> So, were you finally able to test it? > > Not yet, sorry. Machine is currently offline due to a power outage and I cannot > turn it back on remotely, I'm not home until tomorrow. I will be able to test > it tomorrow, however. And? :-) > Adrian MBR, Sergey
Hi Sergey! On 3/2/22 10:31, Sergey Shtylyov wrote: >>>>> I can test your revised patch next week on my SH7785LCR. >>>> >>>> Please do, although testing on the AP-SH4A* bords would be a bit more >>>> interesting, as they actually use IRQ0 for the SMSC911x chip... >>> >>> So, were you finally able to test it? >> >> Not yet, sorry. Machine is currently offline due to a power outage and I cannot >> turn it back on remotely, I'm not home until tomorrow. I will be able to test >> it tomorrow, however. > > And? :-) Sorry, got distracted by other stuff. Will test it right now and let you know later today. Adrian
Hello! On 2/11/22 21:15, Sergey Shtylyov wrote: > Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) > and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify > that code to start the IRQ #s from 16 instead. > > [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ > > Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> > > --- > The patch is against Linus Torvalds' 'linux.git' repo. > > arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- > include/linux/sh_intc.h | 6 +++--- > 2 files changed, 5 insertions(+), 5 deletions(-) > > Index: linux/arch/sh/kernel/cpu/sh3/entry.S > =================================================================== > --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S > +++ linux/arch/sh/kernel/cpu/sh3/entry.S > @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) > mov r4, r0 ! save vector->jmp table offset for later > > shlr2 r4 ! vector to IRQ# conversion > - add #-0x10, r4 > > - cmp/pz r4 ! is it a valid IRQ? > + mov #0x10, r5 > + cmp/ge r5, r4 ! is it a valid IRQ? > bt 10f > > /* > Index: linux/include/linux/sh_intc.h > =================================================================== > --- linux.orig/include/linux/sh_intc.h > +++ linux/include/linux/sh_intc.h > @@ -13,9 +13,9 @@ > /* > * Convert back and forth between INTEVT and IRQ values. > */ > -#ifdef CONFIG_CPU_HAS_INTEVT > -#define evt2irq(evt) (((evt) >> 5) - 16) > -#define irq2evt(irq) (((irq) + 16) << 5) > +#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */ > +#define evt2irq(evt) ((evt) >> 5) > +#define irq2evt(irq) ((irq) << 5) > #else > #define evt2irq(evt) (evt) > #define irq2evt(irq) (irq) Successfully boot-tested without any issues on my SH-7785LCR on top of fb184c4af9b9. Tested-By: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Thanks, Adrian
Index: linux/arch/sh/kernel/cpu/sh3/entry.S =================================================================== --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S +++ linux/arch/sh/kernel/cpu/sh3/entry.S @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) mov r4, r0 ! save vector->jmp table offset for later shlr2 r4 ! vector to IRQ# conversion - add #-0x10, r4 - cmp/pz r4 ! is it a valid IRQ? + mov #0x10, r5 + cmp/ge r5, r4 ! is it a valid IRQ? bt 10f /* Index: linux/include/linux/sh_intc.h =================================================================== --- linux.orig/include/linux/sh_intc.h +++ linux/include/linux/sh_intc.h @@ -13,9 +13,9 @@ /* * Convert back and forth between INTEVT and IRQ values. */ -#ifdef CONFIG_CPU_HAS_INTEVT -#define evt2irq(evt) (((evt) >> 5) - 16) -#define irq2evt(irq) (((irq) + 16) << 5) +#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */ +#define evt2irq(evt) ((evt) >> 5) +#define irq2evt(irq) ((irq) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq)
Using IRQ0 by the platform devices is going to be disallowed soon (see [1]) and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify that code to start the IRQ #s from 16 instead. [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/ Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> --- The patch is against Linus Torvalds' 'linux.git' repo. arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- include/linux/sh_intc.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-)