| Message ID | alpine.DEB.2.21.2203042044580.47558@angie.orcam.me.uk (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 6ddcba9d480b6bcced4223a729794dfa6becb7eb |
| Headers | show |
| Series | MIPS: Sanitise Cavium switch cases in TLB handler synthesizers | expand |
On Fri, Mar 04, 2022 at 09:13:11PM +0000, Maciej W. Rozycki wrote: > It makes no sense to fall through to `break'. Therefore reorder the > switch statements so as to have the Cavium cases first, followed by the > default case, which improves readability and pacifies code analysis > tools. No change in semantics, assembly produced is exactly the same. > > Reported-by: kernel test robot <lkp@intel.com> > Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> > Fixes: bc431d2153cc ("MIPS: Fix fall-through warnings for Clang") > --- > arch/mips/mm/tlbex.c | 23 ++++++++++------------- > 1 file changed, 10 insertions(+), 13 deletions(-) applied to mips-next. Thomas.
Index: linux-macro/arch/mips/mm/tlbex.c =================================================================== --- linux-macro.orig/arch/mips/mm/tlbex.c +++ linux-macro/arch/mips/mm/tlbex.c @@ -2160,16 +2160,14 @@ static void build_r4000_tlb_load_handler uasm_i_tlbr(&p); switch (current_cpu_type()) { - default: - if (cpu_has_mips_r2_exec_hazard) { - uasm_i_ehb(&p); - fallthrough; - case CPU_CAVIUM_OCTEON: case CPU_CAVIUM_OCTEON_PLUS: case CPU_CAVIUM_OCTEON2: - break; - } + break; + default: + if (cpu_has_mips_r2_exec_hazard) + uasm_i_ehb(&p); + break; } /* Examine entrylo 0 or 1 based on ptr. */ @@ -2236,15 +2234,14 @@ static void build_r4000_tlb_load_handler uasm_i_tlbr(&p); switch (current_cpu_type()) { - default: - if (cpu_has_mips_r2_exec_hazard) { - uasm_i_ehb(&p); - case CPU_CAVIUM_OCTEON: case CPU_CAVIUM_OCTEON_PLUS: case CPU_CAVIUM_OCTEON2: - break; - } + break; + default: + if (cpu_has_mips_r2_exec_hazard) + uasm_i_ehb(&p); + break; } /* Examine entrylo 0 or 1 based on ptr. */
It makes no sense to fall through to `break'. Therefore reorder the switch statements so as to have the Cavium cases first, followed by the default case, which improves readability and pacifies code analysis tools. No change in semantics, assembly produced is exactly the same. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Fixes: bc431d2153cc ("MIPS: Fix fall-through warnings for Clang") --- arch/mips/mm/tlbex.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) linux-mips-tlbex-cavium-odd-switch.diff