| Message ID | 20220307134353.1950-5-philippe.mathieu.daude@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw: ISA & MIPS patches from Bernhard Beschow | expand |
On 3/7/22 03:43, Philippe Mathieu-Daudé wrote: > From: Bernhard Beschow<shentey@gmail.com> > > Passing PIIX4State rather than just the qemu_irq allows for resolving > the global piix4_dev variable. > > Signed-off-by: Bernhard Beschow<shentey@gmail.com> > Reviewed-by: Peter Maydell<peter.maydell@linaro.org> > Reviewed-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > Acked-by: Michael S. Tsirkin<mst@redhat.com> > Message-Id:<20220217101924.15347-5-shentey@gmail.com> > Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > --- > hw/isa/piix4.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 179968b18e..caa2002e2c 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - qemu_irq *pic = opaque; + PIIX4State *s = opaque; PCIBus *bus = pci_get_bus(piix4_dev); /* now we change the pic irq level according to the piix irq mappings */ @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) pic_level |= pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(pic[pic_irq], pic_level); + qemu_set_irq(s->isa[pic_irq], pic_level); } } @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) NULL, 0, NULL); } - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); return dev; }