| Message ID | 20220311014245.4612-3-ctcchien@nuvoton.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | EDAC: nuvoton: Add nuvoton NPCM memory controller driver | expand |
On 11/03/2022 02:42, Medad CChien wrote: > Add device tree bindings for NPCM memory controller. Use reasonable subject. You missed the verb describing what are you doing here. See git history for this and other directories. > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > --- > .../edac/nuvoton,npcm-memory-controller.yaml | 62 +++++++++++++++++++ > 1 file changed, 62 insertions(+) > create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml > > diff --git a/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml > new file mode 100644 > index 000000000000..46f61b0806ee > --- /dev/null > +++ b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/edac/npcm-edac.yaml# Please, test your changes. This won't work. Best regards, Krzysztof
On Fri, 11 Mar 2022 09:42:44 +0800, Medad CChien wrote: > Add device tree bindings for NPCM memory controller. > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > --- > .../edac/nuvoton,npcm-memory-controller.yaml | 62 +++++++++++++++++++ > 1 file changed, 62 insertions(+) > create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: ./Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml: $id: relative path/filename doesn't match actual path or filename expected: http://devicetree.org/schemas/edac/nuvoton,npcm-memory-controller.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1604217 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml new file mode 100644 index 000000000000..46f61b0806ee --- /dev/null +++ b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/npcm-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Memory Controller + +maintainers: + - Medad CChien <ctcchien@nuvoton.com> + +description: | + The Nuvoton BMC SoC supports DDR4 memory with and without ECC (error + correction check). + + The memory controller supports single bit error correction, double bit + error detection (in-line ECC in which a section (1/8th) of the + memory device used to store data is used for ECC storage). + + Note, the bootloader must configure ECC mode for the memory controller. + +properties: + compatible: + enum: + - nuvoton,npcm845-memory-controller + - nuvoton,npcm750-memory-controller + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: uncorrectable error interrupt + - description: correctable error interrupt + + interrupt-names: + minItems: 1 + items: + - const: ue + - const: ce + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + ahb { + #address-cells = <2>; + #size-cells = <2>; + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm750-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +
Add device tree bindings for NPCM memory controller. Signed-off-by: Medad CChien <ctcchien@nuvoton.com> --- .../edac/nuvoton,npcm-memory-controller.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml