| Message ID | 20220311014245.4612-2-ctcchien@nuvoton.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | EDAC: nuvoton: Add nuvoton NPCM memory controller driver | expand |
On 11/03/2022 02:42, Medad CChien wrote: > Add NPCM memory controller device node > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > --- Subject is too generic. Describe shortly what are you adding. Best regards, Krzysztof
>Subject: [PATCH v3 1/3] ARM: dts: nuvoton: Add new device node To make it more obvious what this patch is about, I suggest something like: [PATCH v3 1/3] ARM: dts: nuvoton: Add memory controller node This arguably makes the next line in the commit message redundant, but there is other useful information that can be added there, if you like, such as how the kernel is going to use the memory controller. Best regards, Jonathan On Fri, Mar 11, 2022 at 09:42:43AM +0800, Medad CChien wrote: > Add NPCM memory controller device node > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > --- > arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > index 3696980a3da1..ba542b26941e 100644 > --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > @@ -106,6 +106,13 @@ > interrupt-parent = <&gic>; > ranges; > > + mc: memory-controller@f0824000 { > + compatible = "nuvoton,npcm750-memory-controller"; > + reg = <0x0 0xf0824000 0x0 0x1000>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > rstc: rstc@f0801000 { > compatible = "nuvoton,npcm750-reset"; > reg = <0xf0801000 0x70>; > -- > 2.17.1 >
OK, I will check it. thanks for your comment B.R. Medad Jonathan Neuschäfer <j.neuschaefer@gmx.net> 於 2022年3月12日 週六 上午10:31寫道： > > >Subject: [PATCH v3 1/3] ARM: dts: nuvoton: Add new device node > > To make it more obvious what this patch is about, I suggest something like: > > [PATCH v3 1/3] ARM: dts: nuvoton: Add memory controller node > > > This arguably makes the next line in the commit message redundant, > but there is other useful information that can be added there, if you > like, such as how the kernel is going to use the memory controller. > > > Best regards, > Jonathan > > On Fri, Mar 11, 2022 at 09:42:43AM +0800, Medad CChien wrote: > > Add NPCM memory controller device node > > > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > > --- > > arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > > index 3696980a3da1..ba542b26941e 100644 > > --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > > +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > > @@ -106,6 +106,13 @@ > > interrupt-parent = <&gic>; > > ranges; > > > > + mc: memory-controller@f0824000 { > > + compatible = "nuvoton,npcm750-memory-controller"; > > + reg = <0x0 0xf0824000 0x0 0x1000>; > > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > > + status = "disabled"; > > + }; > > + > > rstc: rstc@f0801000 { > > compatible = "nuvoton,npcm750-reset"; > > reg = <0xf0801000 0x70>; > > -- > > 2.17.1 > >
OK, I will Check it. thanks for your comment Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 於 2022年3月11日 週五 下午4:59寫道： > > On 11/03/2022 02:42, Medad CChien wrote: > > Add NPCM memory controller device node > > > > Signed-off-by: Medad CChien <ctcchien@nuvoton.com> > > --- > > Subject is too generic. Describe shortly what are you adding. > > > Best regards, > Krzysztof
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index 3696980a3da1..ba542b26941e 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -106,6 +106,13 @@ interrupt-parent = <&gic>; ranges; + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm750-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + rstc: rstc@f0801000 { compatible = "nuvoton,npcm750-reset"; reg = <0xf0801000 0x70>;
Add NPCM memory controller device node Signed-off-by: Medad CChien <ctcchien@nuvoton.com> --- arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)