| Message ID | 20220226040723.143705-1-marex@denx.de (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [v3,1/3] dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator | expand |
On Sat, 26 Feb 2022 05:07:21 +0100, Marek Vasut wrote: > Add binding for Renesas 9-series PCIe clock generators. This binding > is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C > PCIe clock generators, currently the only tested and supported chip > is 9FGV0241. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: devicetree@vger.kernel.org > To: linux-clk@vger.kernel.org > --- > V2: - Drop clock consumer from the binding example > - Make clocks, i.e. xtal, mandatory > V3: - Rename renesas,out-amplitude to renesas,out-amplitude-microvolt > - Drop type ref: from renesas,out-amplitude-microvolt property > - Explain 'pcm' in description text as 1/1000 of percent > - Add newlines > --- > .../bindings/clock/renesas,9series.yaml | 97 +++++++++++++++++++ > 1 file changed, 97 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/renesas,9series.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
Quoting Marek Vasut (2022-02-25 20:07:21) > Add binding for Renesas 9-series PCIe clock generators. This binding > is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C > PCIe clock generators, currently the only tested and supported chip > is 9FGV0241. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: devicetree@vger.kernel.org > To: linux-clk@vger.kernel.org > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml new file mode 100644 index 0000000000000..102eb95cb3fcd --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,9series.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Binding for Renesas 9-series I2C PCIe clock generators + +description: | + The Renesas 9-series are I2C PCIe clock generators providing + from 1 to 20 output clocks. + + When referencing the provided clock in the DT using phandle + and clock specifier, the following mapping applies: + + - 9FGV0241: + 0 -- DIF0 + 1 -- DIF1 + +maintainers: + - Marek Vasut <marex@denx.de> + +properties: + compatible: + enum: + - renesas,9fgv0241 + + reg: + description: I2C device address + enum: [ 0x68, 0x6a ] + + '#clock-cells': + const: 1 + + clocks: + items: + - description: XTal input clock + + renesas,out-amplitude-microvolt: + enum: [ 600000, 700000, 800000, 900000 ] + description: Output clock signal amplitude + + renesas,out-spread-spectrum: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 100000, 99750, 99500 ] + description: Output clock down spread in pcm (1/1000 of percent) + +patternProperties: + "^DIF[0-19]$": + type: object + description: + Description of one of the outputs (DIF0..DIF19). + + properties: + renesas,slew-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 2000000, 3000000 ] + description: Output clock slew rate select in V/ns + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + /* 25MHz reference crystal */ + ref25: ref25m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + rs9: clock-generator@6a { + compatible = "renesas,9fgv0241"; + reg = <0x6a>; + #clock-cells = <1>; + + clocks = <&ref25m>; + + DIF0 { + renesas,slew-rate = <3000000>; + }; + }; + }; + +...
Add binding for Renesas 9-series PCIe clock generators. This binding is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C PCIe clock generators, currently the only tested and supported chip is 9FGV0241. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: devicetree@vger.kernel.org To: linux-clk@vger.kernel.org --- V2: - Drop clock consumer from the binding example - Make clocks, i.e. xtal, mandatory V3: - Rename renesas,out-amplitude to renesas,out-amplitude-microvolt - Drop type ref: from renesas,out-amplitude-microvolt property - Explain 'pcm' in description text as 1/1000 of percent - Add newlines --- .../bindings/clock/renesas,9series.yaml | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,9series.yaml