| Message ID | 20220210103423.271016-11-vkoul@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | drm/msm: Add Display Stream Compression Support | expand |
On 10/02/2022 13:34, Vinod Koul wrote: > For DSC to work we typically need a 2,2,1 configuration. This should > suffice for resolutions up to 4k. For more resolutions like 8k this won't > work. > > Also, it is better to use 2 LMs and DSC instances as half width results > in lesser power consumption as compared to single LM, DSC at full width. > > The panel has been tested only with 2,2,1 configuration, so for > now we blindly create 2,2,1 topology when DSC is enabled > > Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ > drivers/gpu/drm/msm/msm_drv.h | 2 ++ > 2 files changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 95a7bf362e81..13ccb7b3cce5 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( > topology.num_enc = 0; > topology.num_intf = intf_count; > > + if (dpu_enc->dsc) { > + /* In case of Display Stream Compression DSC, we would use > + * 2 encoders, 2 line mixers and 1 interface > + * this is power optimal and can drive up to (including) 4k > + * screens > + */ > + topology.num_enc = 2; > + topology.num_dsc = 2; > + topology.num_intf = 1; > + topology.num_lm = 2; > + } > + > return topology; > } > + > static int dpu_encoder_virt_atomic_check( > struct drm_encoder *drm_enc, > struct drm_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h > index 6425a42e997c..994d895d1a47 100644 > --- a/drivers/gpu/drm/msm/msm_drv.h > +++ b/drivers/gpu/drm/msm/msm_drv.h > @@ -103,12 +103,14 @@ enum msm_event_wait { > * @num_enc: number of compression encoder blocks used > * @num_intf: number of interfaces the panel is mounted on > * @num_dspp: number of dspp blocks used > + * @num_dsc: number of Display Stream Compression (DSC) blocks used > */ > struct msm_display_topology { > u32 num_lm; > u32 num_enc; > u32 num_intf; > u32 num_dspp; > + u32 num_dsc; > }; > > /**
On 2022-02-10 16:04:20, Vinod Koul wrote: > For DSC to work we typically need a 2,2,1 configuration. This should > suffice for resolutions up to 4k. For more resolutions like 8k this won't > work. > > Also, it is better to use 2 LMs and DSC instances as half width results > in lesser power consumption as compared to single LM, DSC at full width. > > The panel has been tested only with 2,2,1 configuration, so for > now we blindly create 2,2,1 topology when DSC is enabled > > Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ > drivers/gpu/drm/msm/msm_drv.h | 2 ++ > 2 files changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 95a7bf362e81..13ccb7b3cce5 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( > topology.num_enc = 0; > topology.num_intf = intf_count; > > + if (dpu_enc->dsc) { > + /* In case of Display Stream Compression DSC, we would use > + * 2 encoders, 2 line mixers and 1 interface LM is a layer mixer, not a line mixer, right? - Marijn > + * this is power optimal and can drive up to (including) 4k > + * screens > + */ > + topology.num_enc = 2; > + topology.num_dsc = 2; > + topology.num_intf = 1; > + topology.num_lm = 2; > + } > + > return topology; > } > + > static int dpu_encoder_virt_atomic_check( > struct drm_encoder *drm_enc, > struct drm_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h > index 6425a42e997c..994d895d1a47 100644 > --- a/drivers/gpu/drm/msm/msm_drv.h > +++ b/drivers/gpu/drm/msm/msm_drv.h > @@ -103,12 +103,14 @@ enum msm_event_wait { > * @num_enc: number of compression encoder blocks used > * @num_intf: number of interfaces the panel is mounted on > * @num_dspp: number of dspp blocks used > + * @num_dsc: number of Display Stream Compression (DSC) blocks used > */ > struct msm_display_topology { > u32 num_lm; > u32 num_enc; > u32 num_intf; > u32 num_dspp; > + u32 num_dsc; > }; > > /** > -- > 2.31.1 >
On 2022-02-10 16:04:20, Vinod Koul wrote: > For DSC to work we typically need a 2,2,1 configuration. This should > suffice for resolutions up to 4k. For more resolutions like 8k this won't > work. > > Also, it is better to use 2 LMs and DSC instances as half width results > in lesser power consumption as compared to single LM, DSC at full width. > > The panel has been tested only with 2,2,1 configuration, so for > now we blindly create 2,2,1 topology when DSC is enabled > > Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ > drivers/gpu/drm/msm/msm_drv.h | 2 ++ > 2 files changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 95a7bf362e81..13ccb7b3cce5 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( > topology.num_enc = 0; > topology.num_intf = intf_count; > > + if (dpu_enc->dsc) { > + /* In case of Display Stream Compression DSC, we would use Just like elsewhere, since you wrote out Display Stream Compression, write the "DSC" abbreviation between parentheses ()? - Marijn > + * 2 encoders, 2 line mixers and 1 interface + 2 DSC "blocks"? > + * this is power optimal and can drive up to (including) 4k > + * screens > + */ > + topology.num_enc = 2; > + topology.num_dsc = 2; > + topology.num_intf = 1; > + topology.num_lm = 2; > + } > + > return topology; > } > + > static int dpu_encoder_virt_atomic_check( > struct drm_encoder *drm_enc, > struct drm_crtc_state *crtc_state, > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h > index 6425a42e997c..994d895d1a47 100644 > --- a/drivers/gpu/drm/msm/msm_drv.h > +++ b/drivers/gpu/drm/msm/msm_drv.h > @@ -103,12 +103,14 @@ enum msm_event_wait { > * @num_enc: number of compression encoder blocks used > * @num_intf: number of interfaces the panel is mounted on > * @num_dspp: number of dspp blocks used > + * @num_dsc: number of Display Stream Compression (DSC) blocks used > */ > struct msm_display_topology { > u32 num_lm; > u32 num_enc; > u32 num_intf; > u32 num_dspp; > + u32 num_dsc; > }; > > /** > -- > 2.31.1 >
On 17-02-22, 22:44, Marijn Suijten wrote: > On 2022-02-10 16:04:20, Vinod Koul wrote: > > For DSC to work we typically need a 2,2,1 configuration. This should > > suffice for resolutions up to 4k. For more resolutions like 8k this won't > > work. > > > > Also, it is better to use 2 LMs and DSC instances as half width results > > in lesser power consumption as compared to single LM, DSC at full width. > > > > The panel has been tested only with 2,2,1 configuration, so for > > now we blindly create 2,2,1 topology when DSC is enabled > > > > Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> > > Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ > > drivers/gpu/drm/msm/msm_drv.h | 2 ++ > > 2 files changed, 15 insertions(+) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > index 95a7bf362e81..13ccb7b3cce5 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( > > topology.num_enc = 0; > > topology.num_intf = intf_count; > > > > + if (dpu_enc->dsc) { > > + /* In case of Display Stream Compression DSC, we would use > > + * 2 encoders, 2 line mixers and 1 interface > > LM is a layer mixer, not a line mixer, right? Right, thanks for spotting
On 17-02-22, 23:37, Marijn Suijten wrote: > On 2022-02-10 16:04:20, Vinod Koul wrote: > > For DSC to work we typically need a 2,2,1 configuration. This should > > suffice for resolutions up to 4k. For more resolutions like 8k this won't > > work. > > > > Also, it is better to use 2 LMs and DSC instances as half width results > > in lesser power consumption as compared to single LM, DSC at full width. > > > > The panel has been tested only with 2,2,1 configuration, so for > > now we blindly create 2,2,1 topology when DSC is enabled > > > > Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> > > Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ > > drivers/gpu/drm/msm/msm_drv.h | 2 ++ > > 2 files changed, 15 insertions(+) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > index 95a7bf362e81..13ccb7b3cce5 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( > > topology.num_enc = 0; > > topology.num_intf = intf_count; > > > > + if (dpu_enc->dsc) { > > + /* In case of Display Stream Compression DSC, we would use > > Just like elsewhere, since you wrote out Display Stream Compression, > write the "DSC" abbreviation between parentheses ()? Updated
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 95a7bf362e81..13ccb7b3cce5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -574,8 +574,21 @@ static struct msm_display_topology dpu_encoder_get_topology( topology.num_enc = 0; topology.num_intf = intf_count; + if (dpu_enc->dsc) { + /* In case of Display Stream Compression DSC, we would use + * 2 encoders, 2 line mixers and 1 interface + * this is power optimal and can drive up to (including) 4k + * screens + */ + topology.num_enc = 2; + topology.num_dsc = 2; + topology.num_intf = 1; + topology.num_lm = 2; + } + return topology; } + static int dpu_encoder_virt_atomic_check( struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 6425a42e997c..994d895d1a47 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -103,12 +103,14 @@ enum msm_event_wait { * @num_enc: number of compression encoder blocks used * @num_intf: number of interfaces the panel is mounted on * @num_dspp: number of dspp blocks used + * @num_dsc: number of Display Stream Compression (DSC) blocks used */ struct msm_display_topology { u32 num_lm; u32 num_enc; u32 num_intf; u32 num_dspp; + u32 num_dsc; }; /**