| Message ID | 20220330143819.27476-3-sumitg@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | viresh kumar |
| Headers | show |
| Series | Tegra234 cpufreq driver support | expand |
On Wed, 30 Mar 2022 20:08:17 +0530, Sumit Gupta wrote: > The Tegra CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> > --- > .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.example.dt.yaml: example-0: ccplex@e000000:reg:0: [0, 234881024, 0, 393215] is too long From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Wed, Mar 30, 2022 at 08:08:17PM +0530, Sumit Gupta wrote: > The Tegra CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> > --- > .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > new file mode 100644 > index 000000000000..74afa06f695e > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings > + > +maintainers: > + - Sumit Gupta <sumitg@nvidia.com> > + - Mikko Perttunen <mperttunen@nvidia.com> > + - Jon Hunter <jonathanh@nvidia.com> > + - Thierry Reding <thierry.reding@gmail.com> > + > +description: |+ > + The Tegra CCPLEX_CLUSTER area contains memory-mapped > + registers that initiate CPU frequency/voltage transitions. > + > +properties: > + $nodename: > + pattern: "ccplex@([0-9a-f]+)$" > + > + compatible: > + enum: > + - nvidia,tegra186-ccplex-cluster > + - nvidia,tegra234-ccplex-cluster > + > + reg: > + maxItems: 1 > + > + nvidia,bpmp: > + $ref: '/schemas/types.yaml#/definitions/phandle' > + description: | > + Specifies the bpmp node that needs to be queried to get > + operating point data for all CPUs. > + > +additionalProperties: true > + > +required: > + - compatible > + - reg > + - nvidia,bpmp > + - status status is never required. > + > +examples: > + - | > + ccplex@e000000 { > + compatible = "nvidia,tegra234-ccplex-cluster"; > + reg = <0x0 0x0e000000 0x0 0x5ffff>; > + nvidia,bpmp = <&bpmp>; > + status = "okay"; Nor should it be in examples. > + }; > -- > 2.17.1 > >
Please update the subject to be something like ... "dt-bindings: Document Tegra CCPLEX Cluster" On 30/03/2022 15:38, Sumit Gupta wrote: > The Tegra CCPLEX_CLUSTER area contains memory-mapped Here you have CCPLEX_CLUSTER and ... > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> > --- > .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > new file mode 100644 > index 000000000000..74afa06f695e > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings ... here we have "CPU_CLUSTER" and ... > + > +maintainers: > + - Sumit Gupta <sumitg@nvidia.com> > + - Mikko Perttunen <mperttunen@nvidia.com> > + - Jon Hunter <jonathanh@nvidia.com> > + - Thierry Reding <thierry.reding@gmail.com> > + > +description: |+ > + The Tegra CCPLEX_CLUSTER area contains memory-mapped .. then we have CCPLEX_CLUSTER again. Let's have a consistent name such as 'CPU COMPLEX CLUSTER' (admittedly a mouthful but that is what is means). I don't think we need the '_' in the name. > + registers that initiate CPU frequency/voltage transitions. > + > +properties: > + $nodename: > + pattern: "ccplex@([0-9a-f]+)$" > + > + compatible: > + enum: > + - nvidia,tegra186-ccplex-cluster > + - nvidia,tegra234-ccplex-cluster > + > + reg: > + maxItems: 1 > + > + nvidia,bpmp: > + $ref: '/schemas/types.yaml#/definitions/phandle' > + description: | > + Specifies the bpmp node that needs to be queried to get s/bpmp/BPMP > + operating point data for all CPUs. > + > +additionalProperties: true > + > +required: > + - compatible > + - reg > + - nvidia,bpmp > + - status > + > +examples: > + - | > + ccplex@e000000 { > + compatible = "nvidia,tegra234-ccplex-cluster"; > + reg = <0x0 0x0e000000 0x0 0x5ffff>; > + nvidia,bpmp = <&bpmp>; > + status = "okay"; > + };
On 31/03/22 12:30, Jon Hunter wrote: > Please update the subject to be something like ... > > "dt-bindings: Document Tegra CCPLEX Cluster" Ok. will do the change and send v3. > > On 30/03/2022 15:38, Sumit Gupta wrote: >> The Tegra CCPLEX_CLUSTER area contains memory-mapped > > Here you have CCPLEX_CLUSTER and ... > >> registers that initiate CPU frequency/voltage transitions. >> >> Signed-off-by: Sumit Gupta <sumitg@nvidia.com> >> --- >> .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++ >> 1 file changed, 52 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml >> >> >> diff --git >> a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml >> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml >> >> new file mode 100644 >> index 000000000000..74afa06f695e >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml >> >> @@ -0,0 +1,52 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: >> "https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Farm%2Ftegra%2Fnvidia%2Ctegra-ccplex-cluster.yaml%23&data=04%7C01%7Csumitg%40nvidia.com%7C15234587dd2e46ad722108da12e42b88%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637843068437808995%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=tDheliQYxde7WJ5hqLYUz7dsq4tsUnFe3gHlaTRa7i4%3D&reserved=0" >> >> +$schema: >> "https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Csumitg%40nvidia.com%7C15234587dd2e46ad722108da12e42b88%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637843068437808995%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=%2BWDvqJkJKdG0z85Bfn%2F3AMejwHVvi02cVLarmKbZ0iE%3D&reserved=0" >> >> + >> +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings > > ... here we have "CPU_CLUSTER" and ... > >> + >> +maintainers: >> + - Sumit Gupta <sumitg@nvidia.com> >> + - Mikko Perttunen <mperttunen@nvidia.com> >> + - Jon Hunter <jonathanh@nvidia.com> >> + - Thierry Reding <thierry.reding@gmail.com> >> + >> +description: |+ >> + The Tegra CCPLEX_CLUSTER area contains memory-mapped > > .. then we have CCPLEX_CLUSTER again. Let's have a consistent name such > as 'CPU COMPLEX CLUSTER' (admittedly a mouthful but that is what is > means). I don't think we need the '_' in the name. Sure. will update all places to 'CPU COMPLEX CLUSTER' in v3. > >> + registers that initiate CPU frequency/voltage transitions. >> + >> +properties: >> + $nodename: >> + pattern: "ccplex@([0-9a-f]+)$" >> + >> + compatible: >> + enum: >> + - nvidia,tegra186-ccplex-cluster >> + - nvidia,tegra234-ccplex-cluster >> + >> + reg: >> + maxItems: 1 >> + >> + nvidia,bpmp: >> + $ref: '/schemas/types.yaml#/definitions/phandle' >> + description: | >> + Specifies the bpmp node that needs to be queried to get > > s/bpmp/BPMP > >> + operating point data for all CPUs. >> + >> +additionalProperties: true >> + >> +required: >> + - compatible >> + - reg >> + - nvidia,bpmp >> + - status >> + >> +examples: >> + - | >> + ccplex@e000000 { >> + compatible = "nvidia,tegra234-ccplex-cluster"; >> + reg = <0x0 0x0e000000 0x0 0x5ffff>; >> + nvidia,bpmp = <&bpmp>; >> + status = "okay"; >> + }; >
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml new file mode 100644 index 000000000000..74afa06f695e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings + +maintainers: + - Sumit Gupta <sumitg@nvidia.com> + - Mikko Perttunen <mperttunen@nvidia.com> + - Jon Hunter <jonathanh@nvidia.com> + - Thierry Reding <thierry.reding@gmail.com> + +description: |+ + The Tegra CCPLEX_CLUSTER area contains memory-mapped + registers that initiate CPU frequency/voltage transitions. + +properties: + $nodename: + pattern: "ccplex@([0-9a-f]+)$" + + compatible: + enum: + - nvidia,tegra186-ccplex-cluster + - nvidia,tegra234-ccplex-cluster + + reg: + maxItems: 1 + + nvidia,bpmp: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Specifies the bpmp node that needs to be queried to get + operating point data for all CPUs. + +additionalProperties: true + +required: + - compatible + - reg + - nvidia,bpmp + - status + +examples: + - | + ccplex@e000000 { + compatible = "nvidia,tegra234-ccplex-cluster"; + reg = <0x0 0x0e000000 0x0 0x5ffff>; + nvidia,bpmp = <&bpmp>; + status = "okay"; + };
The Tegra CCPLEX_CLUSTER area contains memory-mapped registers that initiate CPU frequency/voltage transitions. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> --- .../tegra/nvidia,tegra-ccplex-cluster.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml