| Message ID | 20220331222017.2914409-2-edgar.iglesias@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw/arm: zynqmp: Add the 4 TTC timers | expand |
On Fri, Apr 1, 2022 at 8:24 AM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > > From: "Edgar E. Iglesias" <edgar.iglesias@amd.com> > > Break out header file to allow embedding of the the TTC. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > include/hw/timer/cadence_ttc.h | 54 ++++++++++++++++++++++++++++++++++ > hw/timer/cadence_ttc.c | 32 ++------------------ > 2 files changed, 56 insertions(+), 30 deletions(-) > create mode 100644 include/hw/timer/cadence_ttc.h > > diff --git a/include/hw/timer/cadence_ttc.h b/include/hw/timer/cadence_ttc.h > new file mode 100644 > index 0000000000..e1251383f2 > --- /dev/null > +++ b/include/hw/timer/cadence_ttc.h > @@ -0,0 +1,54 @@ > +/* > + * Xilinx Zynq cadence TTC model > + * > + * Copyright (c) 2011 Xilinx Inc. > + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) > + * Copyright (c) 2012 PetaLogix Pty Ltd. > + * Written By Haibing Ma > + * M. Habib > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later version. > + * > + * You should have received a copy of the GNU General Public License along > + * with this program; if not, see <http://www.gnu.org/licenses/>. > + */ > +#ifndef HW_TIMER_CADENCE_TTC_H > +#define HW_TIMER_CADENCE_TTC_H > + > +#include "hw/sysbus.h" > +#include "qemu/timer.h" > + > +typedef struct { > + QEMUTimer *timer; > + int freq; > + > + uint32_t reg_clock; > + uint32_t reg_count; > + uint32_t reg_value; > + uint16_t reg_interval; > + uint16_t reg_match[3]; > + uint32_t reg_intr; > + uint32_t reg_intr_en; > + uint32_t reg_event_ctrl; > + uint32_t reg_event; > + > + uint64_t cpu_time; > + unsigned int cpu_time_valid; > + > + qemu_irq irq; > +} CadenceTimerState; > + > +#define TYPE_CADENCE_TTC "cadence_ttc" > +OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > + > +struct CadenceTTCState { > + SysBusDevice parent_obj; > + > + MemoryRegion iomem; > + CadenceTimerState timer[3]; > +}; > + > +#endif > diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c > index 64108241ba..e57a0f5f09 100644 > --- a/hw/timer/cadence_ttc.c > +++ b/hw/timer/cadence_ttc.c > @@ -24,6 +24,8 @@ > #include "qemu/timer.h" > #include "qom/object.h" > > +#include "hw/timer/cadence_ttc.h" > + > #ifdef CADENCE_TTC_ERR_DEBUG > #define DB_PRINT(...) do { \ > fprintf(stderr, ": %s: ", __func__); \ > @@ -49,36 +51,6 @@ > #define CLOCK_CTRL_PS_EN 0x00000001 > #define CLOCK_CTRL_PS_V 0x0000001e > > -typedef struct { > - QEMUTimer *timer; > - int freq; > - > - uint32_t reg_clock; > - uint32_t reg_count; > - uint32_t reg_value; > - uint16_t reg_interval; > - uint16_t reg_match[3]; > - uint32_t reg_intr; > - uint32_t reg_intr_en; > - uint32_t reg_event_ctrl; > - uint32_t reg_event; > - > - uint64_t cpu_time; > - unsigned int cpu_time_valid; > - > - qemu_irq irq; > -} CadenceTimerState; > - > -#define TYPE_CADENCE_TTC "cadence_ttc" > -OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > - > -struct CadenceTTCState { > - SysBusDevice parent_obj; > - > - MemoryRegion iomem; > - CadenceTimerState timer[3]; > -}; > - > static void cadence_timer_update(CadenceTimerState *s) > { > qemu_set_irq(s->irq, !!(s->reg_intr & s->reg_intr_en)); > -- > 2.25.1 > >
On 00:20 Fri 01 Apr , Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@amd.com> > > Break out header file to allow embedding of the the TTC. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Luc Michel <luc@lmichel.fr> > --- > include/hw/timer/cadence_ttc.h | 54 ++++++++++++++++++++++++++++++++++ > hw/timer/cadence_ttc.c | 32 ++------------------ > 2 files changed, 56 insertions(+), 30 deletions(-) > create mode 100644 include/hw/timer/cadence_ttc.h > > diff --git a/include/hw/timer/cadence_ttc.h b/include/hw/timer/cadence_ttc.h > new file mode 100644 > index 0000000000..e1251383f2 > --- /dev/null > +++ b/include/hw/timer/cadence_ttc.h > @@ -0,0 +1,54 @@ > +/* > + * Xilinx Zynq cadence TTC model > + * > + * Copyright (c) 2011 Xilinx Inc. > + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) > + * Copyright (c) 2012 PetaLogix Pty Ltd. > + * Written By Haibing Ma > + * M. Habib > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later version. > + * > + * You should have received a copy of the GNU General Public License along > + * with this program; if not, see <http://www.gnu.org/licenses/>. > + */ > +#ifndef HW_TIMER_CADENCE_TTC_H > +#define HW_TIMER_CADENCE_TTC_H > + > +#include "hw/sysbus.h" > +#include "qemu/timer.h" > + > +typedef struct { > + QEMUTimer *timer; > + int freq; > + > + uint32_t reg_clock; > + uint32_t reg_count; > + uint32_t reg_value; > + uint16_t reg_interval; > + uint16_t reg_match[3]; > + uint32_t reg_intr; > + uint32_t reg_intr_en; > + uint32_t reg_event_ctrl; > + uint32_t reg_event; > + > + uint64_t cpu_time; > + unsigned int cpu_time_valid; > + > + qemu_irq irq; > +} CadenceTimerState; > + > +#define TYPE_CADENCE_TTC "cadence_ttc" > +OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > + > +struct CadenceTTCState { > + SysBusDevice parent_obj; > + > + MemoryRegion iomem; > + CadenceTimerState timer[3]; > +}; > + > +#endif > diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c > index 64108241ba..e57a0f5f09 100644 > --- a/hw/timer/cadence_ttc.c > +++ b/hw/timer/cadence_ttc.c > @@ -24,6 +24,8 @@ > #include "qemu/timer.h" > #include "qom/object.h" > > +#include "hw/timer/cadence_ttc.h" > + > #ifdef CADENCE_TTC_ERR_DEBUG > #define DB_PRINT(...) do { \ > fprintf(stderr, ": %s: ", __func__); \ > @@ -49,36 +51,6 @@ > #define CLOCK_CTRL_PS_EN 0x00000001 > #define CLOCK_CTRL_PS_V 0x0000001e > > -typedef struct { > - QEMUTimer *timer; > - int freq; > - > - uint32_t reg_clock; > - uint32_t reg_count; > - uint32_t reg_value; > - uint16_t reg_interval; > - uint16_t reg_match[3]; > - uint32_t reg_intr; > - uint32_t reg_intr_en; > - uint32_t reg_event_ctrl; > - uint32_t reg_event; > - > - uint64_t cpu_time; > - unsigned int cpu_time_valid; > - > - qemu_irq irq; > -} CadenceTimerState; > - > -#define TYPE_CADENCE_TTC "cadence_ttc" > -OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > - > -struct CadenceTTCState { > - SysBusDevice parent_obj; > - > - MemoryRegion iomem; > - CadenceTimerState timer[3]; > -}; > - > static void cadence_timer_update(CadenceTimerState *s) > { > qemu_set_irq(s->irq, !!(s->reg_intr & s->reg_intr_en)); > -- > 2.25.1 > --
On [2022 Apr 01] Fri 00:20:16, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@amd.com> > > Break out header file to allow embedding of the the TTC. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> > --- > include/hw/timer/cadence_ttc.h | 54 ++++++++++++++++++++++++++++++++++ > hw/timer/cadence_ttc.c | 32 ++------------------ > 2 files changed, 56 insertions(+), 30 deletions(-) > create mode 100644 include/hw/timer/cadence_ttc.h > > diff --git a/include/hw/timer/cadence_ttc.h b/include/hw/timer/cadence_ttc.h > new file mode 100644 > index 0000000000..e1251383f2 > --- /dev/null > +++ b/include/hw/timer/cadence_ttc.h > @@ -0,0 +1,54 @@ > +/* > + * Xilinx Zynq cadence TTC model > + * > + * Copyright (c) 2011 Xilinx Inc. > + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) > + * Copyright (c) 2012 PetaLogix Pty Ltd. > + * Written By Haibing Ma > + * M. Habib > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later version. > + * > + * You should have received a copy of the GNU General Public License along > + * with this program; if not, see <http://www.gnu.org/licenses/>. > + */ > +#ifndef HW_TIMER_CADENCE_TTC_H > +#define HW_TIMER_CADENCE_TTC_H > + > +#include "hw/sysbus.h" > +#include "qemu/timer.h" > + > +typedef struct { > + QEMUTimer *timer; > + int freq; > + > + uint32_t reg_clock; > + uint32_t reg_count; > + uint32_t reg_value; > + uint16_t reg_interval; > + uint16_t reg_match[3]; > + uint32_t reg_intr; > + uint32_t reg_intr_en; > + uint32_t reg_event_ctrl; > + uint32_t reg_event; > + > + uint64_t cpu_time; > + unsigned int cpu_time_valid; > + > + qemu_irq irq; > +} CadenceTimerState; > + > +#define TYPE_CADENCE_TTC "cadence_ttc" > +OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > + > +struct CadenceTTCState { > + SysBusDevice parent_obj; > + > + MemoryRegion iomem; > + CadenceTimerState timer[3]; > +}; > + > +#endif > diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c > index 64108241ba..e57a0f5f09 100644 > --- a/hw/timer/cadence_ttc.c > +++ b/hw/timer/cadence_ttc.c > @@ -24,6 +24,8 @@ > #include "qemu/timer.h" > #include "qom/object.h" > > +#include "hw/timer/cadence_ttc.h" > + > #ifdef CADENCE_TTC_ERR_DEBUG > #define DB_PRINT(...) do { \ > fprintf(stderr, ": %s: ", __func__); \ > @@ -49,36 +51,6 @@ > #define CLOCK_CTRL_PS_EN 0x00000001 > #define CLOCK_CTRL_PS_V 0x0000001e > > -typedef struct { > - QEMUTimer *timer; > - int freq; > - > - uint32_t reg_clock; > - uint32_t reg_count; > - uint32_t reg_value; > - uint16_t reg_interval; > - uint16_t reg_match[3]; > - uint32_t reg_intr; > - uint32_t reg_intr_en; > - uint32_t reg_event_ctrl; > - uint32_t reg_event; > - > - uint64_t cpu_time; > - unsigned int cpu_time_valid; > - > - qemu_irq irq; > -} CadenceTimerState; > - > -#define TYPE_CADENCE_TTC "cadence_ttc" > -OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) > - > -struct CadenceTTCState { > - SysBusDevice parent_obj; > - > - MemoryRegion iomem; > - CadenceTimerState timer[3]; > -}; > - > static void cadence_timer_update(CadenceTimerState *s) > { > qemu_set_irq(s->irq, !!(s->reg_intr & s->reg_intr_en)); > -- > 2.25.1 >
diff --git a/include/hw/timer/cadence_ttc.h b/include/hw/timer/cadence_ttc.h new file mode 100644 index 0000000000..e1251383f2 --- /dev/null +++ b/include/hw/timer/cadence_ttc.h @@ -0,0 +1,54 @@ +/* + * Xilinx Zynq cadence TTC model + * + * Copyright (c) 2011 Xilinx Inc. + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) + * Copyright (c) 2012 PetaLogix Pty Ltd. + * Written By Haibing Ma + * M. Habib + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + */ +#ifndef HW_TIMER_CADENCE_TTC_H +#define HW_TIMER_CADENCE_TTC_H + +#include "hw/sysbus.h" +#include "qemu/timer.h" + +typedef struct { + QEMUTimer *timer; + int freq; + + uint32_t reg_clock; + uint32_t reg_count; + uint32_t reg_value; + uint16_t reg_interval; + uint16_t reg_match[3]; + uint32_t reg_intr; + uint32_t reg_intr_en; + uint32_t reg_event_ctrl; + uint32_t reg_event; + + uint64_t cpu_time; + unsigned int cpu_time_valid; + + qemu_irq irq; +} CadenceTimerState; + +#define TYPE_CADENCE_TTC "cadence_ttc" +OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) + +struct CadenceTTCState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + CadenceTimerState timer[3]; +}; + +#endif diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 64108241ba..e57a0f5f09 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -24,6 +24,8 @@ #include "qemu/timer.h" #include "qom/object.h" +#include "hw/timer/cadence_ttc.h" + #ifdef CADENCE_TTC_ERR_DEBUG #define DB_PRINT(...) do { \ fprintf(stderr, ": %s: ", __func__); \ @@ -49,36 +51,6 @@ #define CLOCK_CTRL_PS_EN 0x00000001 #define CLOCK_CTRL_PS_V 0x0000001e -typedef struct { - QEMUTimer *timer; - int freq; - - uint32_t reg_clock; - uint32_t reg_count; - uint32_t reg_value; - uint16_t reg_interval; - uint16_t reg_match[3]; - uint32_t reg_intr; - uint32_t reg_intr_en; - uint32_t reg_event_ctrl; - uint32_t reg_event; - - uint64_t cpu_time; - unsigned int cpu_time_valid; - - qemu_irq irq; -} CadenceTimerState; - -#define TYPE_CADENCE_TTC "cadence_ttc" -OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC) - -struct CadenceTTCState { - SysBusDevice parent_obj; - - MemoryRegion iomem; - CadenceTimerState timer[3]; -}; - static void cadence_timer_update(CadenceTimerState *s) { qemu_set_irq(s->irq, !!(s->reg_intr & s->reg_intr_en));