mbox series

[v5,0/2] phy: mediatek: Add PCIe PHY driver

Message ID 20220326022728.2969-1-jianjun.wang@mediatek.com (mailing list archive)
Headers show
Series phy: mediatek: Add PCIe PHY driver | expand

Message

Jianjun Wang (王建军) March 26, 2022, 2:27 a.m. UTC
These series patches add support for PCIe PHY driver on MediaTek chipsets.

Changes in v5:
1. Fix typo in kerneldoc: "eFues" => "eFuse".

Changes in v4:
1. Fix no return when calling dev_err_probe.

Changes in v3:
1. Add introductions for structure members;
2. Add SoC dependent data;
3. Dynamically allocate efuse data;
4. Check return value if it's an -EPROBE_DEFER.

Changes in v2:
1. Add specific compatible name;
2. Read NVMEM data at probe time;
3. Fix typos.

Jianjun Wang (2):
  dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
  phy: mediatek: Add PCIe PHY driver

 .../bindings/phy/mediatek,pcie-phy.yaml       |  75 +++++
 drivers/phy/mediatek/Kconfig                  |  11 +
 drivers/phy/mediatek/Makefile                 |   1 +
 drivers/phy/mediatek/phy-mtk-pcie.c           | 272 ++++++++++++++++++
 4 files changed, 359 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
 create mode 100644 drivers/phy/mediatek/phy-mtk-pcie.c

Comments

Jianjun Wang (王建军) April 6, 2022, 5:47 a.m. UTC | #1
Hello Maintainers,

Is there anything I can do to get these patches merged?

Thanks.

On Sat, 2022-03-26 at 10:27 +0800, Jianjun Wang wrote:
> These series patches add support for PCIe PHY driver on MediaTek
> chipsets.
> 
> Changes in v5:
> 1. Fix typo in kerneldoc: "eFues" => "eFuse".
> 
> Changes in v4:
> 1. Fix no return when calling dev_err_probe.
> 
> Changes in v3:
> 1. Add introductions for structure members;
> 2. Add SoC dependent data;
> 3. Dynamically allocate efuse data;
> 4. Check return value if it's an -EPROBE_DEFER.
> 
> Changes in v2:
> 1. Add specific compatible name;
> 2. Read NVMEM data at probe time;
> 3. Fix typos.
> 
> Jianjun Wang (2):
>   dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
>   phy: mediatek: Add PCIe PHY driver
> 
>  .../bindings/phy/mediatek,pcie-phy.yaml       |  75 +++++
>  drivers/phy/mediatek/Kconfig                  |  11 +
>  drivers/phy/mediatek/Makefile                 |   1 +
>  drivers/phy/mediatek/phy-mtk-pcie.c           | 272
> ++++++++++++++++++
>  4 files changed, 359 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
>  create mode 100644 drivers/phy/mediatek/phy-mtk-pcie.c
>
Krzysztof Kozlowski April 6, 2022, 3:38 p.m. UTC | #2
On Wed, 6 Apr 2022 at 07:47, Jianjun Wang <jianjun.wang@mediatek.com> wrote:
>
> Hello Maintainers,
>
> Is there anything I can do to get these patches merged?

Patience. :) You posted a patch during the merge window which finished
three days ago, so basically one can assume you ping folks after three
days. Three days is too fast for pinging. :(

Best regards,
Krzysztof
Jianjun Wang (王建军) April 7, 2022, 2:27 a.m. UTC | #3
On Wed, 2022-04-06 at 17:38 +0200, Krzysztof Kozlowski wrote:
> On Wed, 6 Apr 2022 at 07:47, Jianjun Wang <jianjun.wang@mediatek.com>
> wrote:
> > 
> > Hello Maintainers,
> > 
> > Is there anything I can do to get these patches merged?
> 
> Patience. :) You posted a patch during the merge window which
> finished
> three days ago, so basically one can assume you ping folks after
> three
> days. Three days is too fast for pinging. :(

Oh, right, thanks for the reminder.

Thanks.
> 
> Best regards,
> Krzysztof