diff mbox series

drm: rcar-du: Extend CMM HDSE documentation

Message ID 20220409185706.505319-1-kieran.bingham+renesas@ideasonboard.com (mailing list archive)
State Mainlined
Commit 5278027b3df1a157c7f7d8e3f7e3ba2884aaeee5
Delegated to: Kieran Bingham
Headers show
Series drm: rcar-du: Extend CMM HDSE documentation | expand

Commit Message

Kieran Bingham April 9, 2022, 6:57 p.m. UTC
When the CMM is enabled, the HDSE offset is further adjusted to
compensate for consumed pixels.

Explain this further, with an extra comment at the point the offset is
adjusted.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
 drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Laurent Pinchart April 10, 2022, 3:22 p.m. UTC | #1
Hi Kieran,

Thank you for the patch.

On Sat, Apr 09, 2022 at 07:57:06PM +0100, Kieran Bingham wrote:
> When the CMM is enabled, the HDSE offset is further adjusted to
> compensate for consumed pixels.
> 
> Explain this further, with an extra comment at the point the offset is
> adjusted.
> 
> Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
>  drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> index f361a604337f..23e1aedf8dc0 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -300,6 +300,11 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
>  	     | DSMR_DIPM_DISP | DSMR_CSPM;
>  	rcar_du_crtc_write(rcrtc, DSMR, dsmr);
>  
> +	/*
> +	 * When the CMM is enabled, an additional offset of 25 pixels must be
> +	 * subtracted from the HDS (horizontal display start) and HDE
> +	 * (horizontal display end) registers.
> +	 */
>  	hdse_offset = 19;
>  	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))
>  		hdse_offset += 25;
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index f361a604337f..23e1aedf8dc0 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -300,6 +300,11 @@  static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
 	     | DSMR_DIPM_DISP | DSMR_CSPM;
 	rcar_du_crtc_write(rcrtc, DSMR, dsmr);
 
+	/*
+	 * When the CMM is enabled, an additional offset of 25 pixels must be
+	 * subtracted from the HDS (horizontal display start) and HDE
+	 * (horizontal display end) registers.
+	 */
 	hdse_offset = 19;
 	if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2))
 		hdse_offset += 25;