| Message ID | 20220410193544.1745684-3-aford173@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V4,1/3] dt-bindings: mmc: imx-esdhc: Update compatible fallbacks | expand |
On 10/04/2022 21:35, Adam Ford wrote: > The SDHC controller in the imx8mp has the same controller > as the imx8mm which supports HS400-ES. Change the compatible > fallback to imx8mm to enable it, but keep the imx7d-usdhc > to prevent breaking backwards compatibility. > > Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 10.04.22 21:35, Adam Ford wrote: > The SDHC controller in the imx8mp has the same controller > as the imx8mm which supports HS400-ES. Change the compatible > fallback to imx8mm to enable it, but keep the imx7d-usdhc > to prevent breaking backwards compatibility. > > Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Thanks, Ahmad > --- > V4: No Change > V3: No change > V2: Keep fallback to fsl,imx7d-usdhc to prevent breakage > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 794d75173cf5..8578ff1062e6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -769,7 +769,7 @@ i2c6: i2c@30ae0000 { > }; > > usdhc1: mmc@30b40000 { > - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; > + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; > reg = <0x30b40000 0x10000>; > interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_DUMMY>, > @@ -783,7 +783,7 @@ usdhc1: mmc@30b40000 { > }; > > usdhc2: mmc@30b50000 { > - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; > + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; > reg = <0x30b50000 0x10000>; > interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_DUMMY>, > @@ -797,7 +797,7 @@ usdhc2: mmc@30b50000 { > }; > > usdhc3: mmc@30b60000 { > - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; > + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; > reg = <0x30b60000 0x10000>; > interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_DUMMY>,
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 794d75173cf5..8578ff1062e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -769,7 +769,7 @@ i2c6: i2c@30ae0000 { }; usdhc1: mmc@30b40000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b40000 0x10000>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>, @@ -783,7 +783,7 @@ usdhc1: mmc@30b40000 { }; usdhc2: mmc@30b50000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b50000 0x10000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>, @@ -797,7 +797,7 @@ usdhc2: mmc@30b50000 { }; usdhc3: mmc@30b60000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b60000 0x10000>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>,
The SDHC controller in the imx8mp has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> --- V4: No Change V3: No change V2: Keep fallback to fsl,imx7d-usdhc to prevent breakage