Message ID | 20220408131303.147840-1-fbarrat@linux.ibm.com (mailing list archive) |
---|---|
Headers | show |
Series | Remove PCIE root bridge LSI on powernv | expand |
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel On 4/8/22 10:13, Frederic Barrat wrote: > The powernv8/powernv9/powernv10 machines allocate a LSI for their root > port bridge, which is not the case on real hardware. The default root > port implementation in qemu requests a LSI. Since the powernv > implementation derives from it, that's where the LSI is coming > from. This series fixes it, so that the model matches the hardware. > > However, the code in hw/pci to handle AER and hotplug events assume a > LSI is defined. It tends to assert/deassert a LSI if MSI or MSIX is > not enabled. Since we have hardware where that is not true, this patch > also fixes a few code paths to check if a LSI is configured before > trying to trigger it. > > > Changes from v1: > - addressed comments from Daniel > > > Frederic Barrat (2): > pcie: Don't try triggering a LSI when not defined > ppc/pnv: Remove LSI on the PCIE host bridge > > hw/pci-host/pnv_phb3.c | 1 + > hw/pci-host/pnv_phb4.c | 1 + > hw/pci/pcie.c | 5 +++-- > hw/pci/pcie_aer.c | 2 +- > 4 files changed, 6 insertions(+), 3 deletions(-) >