| Message ID | 20220426060808.78225-1-cai.huoqing@linux.dev (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/nvdla: Add driver support for NVDLA | expand |
On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > which is integrated into NVIDIA Jetson AGX Xavier, > so add driver support for this accelerator." Hi, nice to see this work going on. For subsequent revisions, can you please also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as the Tegra platform maintainers (that's Jon Hunter and myself). This will make sure that more people with an interest in this will see your work. Not everyone follows dri-devel, linaro-mm-sig or linux-media. Thanks, Thierry > > v1->v2: > *Rename nvdla_drm.[ch] to nvdla_drv.[ch] and rename nvdla_ioctl.h to nvdla_drm.h, > move it to uapi. > comments link: https://lore.kernel.org/lkml/20bac605-97e6-e5cd-c4e4-83a8121645d8@amd.com/ > *Remove the onexistent filename in Makefile > comments link: https://lore.kernel.org/lkml/202204201512.pp20MXT5-lkp@intel.com/ > *Sort file names alphabetically in Makefile. > *Rearrange the error messages, and use drm_err/_dbg() instead of pr_err/_dbg(). > *Replace "dla_" prefix with "nvdla_" > *Check the iosys_map by iosys_map_is_null(), and check "ret" directly. > *Using iosys_map_memcpy_to/_from() for iosys_map instead of memcpy() > *Fix parameter error "dma_buf_vunmap(buf, ptr)", use "&map" instead of "ptr" > *Use iosys_map instead of kvaddr and use "iosys_map_set_vaddr()" to initialize iosys_map > *Using "vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node)" to update vm_pgoff is cleaner > *Remove the unused nvdla_drm_gem_mmap, register drm_gem_mmap to file_operations directly. > *Use DEFINE_DRM_GEM_FOPS() to define nvdla_drm_fops. > *Remove the unused nvdla_drm_gem_mmap_buf, register drm_gem_prime_mmap to drm_driver directly. > comments link: https://lore.kernel.org/lkml/7fa19996-5830-af3d-ab24-08c76e1d5604@suse.de/ > *Fix typo and some code style > *Remove unused function nvdla_get_time_us() > comments link: https://lore.kernel.org/lkml/0fa9ab41-c18e-a569-e6fe-a0e9d965905e@stargateuniverse.net/ > > Cai Huoqing (4): > MAINTAINERS: Add the driver info of the NVDLA > drm/nvdla: Add driver support for NVDLA > drm/nvdla: Add register head file of NVDLA > drm/nvdla/uapi: Add UAPI of NVDLA driver > > MAINTAINERS | 7 + > drivers/gpu/drm/Kconfig | 2 + > drivers/gpu/drm/Makefile | 1 + > drivers/gpu/drm/nvdla/Kconfig | 8 + > drivers/gpu/drm/nvdla/Makefile | 17 + > drivers/gpu/drm/nvdla/nvdla_bdma.c | 198 + > drivers/gpu/drm/nvdla/nvdla_cache.c | 202 + > drivers/gpu/drm/nvdla/nvdla_cdp.c | 299 ++ > drivers/gpu/drm/nvdla/nvdla_common.c | 293 ++ > drivers/gpu/drm/nvdla/nvdla_common.h | 835 +++ > drivers/gpu/drm/nvdla/nvdla_conv.c | 684 +++ > drivers/gpu/drm/nvdla/nvdla_drv.c | 694 +++ > drivers/gpu/drm/nvdla/nvdla_drv.h | 129 + > drivers/gpu/drm/nvdla/nvdla_engine.c | 233 + > drivers/gpu/drm/nvdla/nvdla_engine.h | 272 + > drivers/gpu/drm/nvdla/nvdla_gem.c | 358 ++ > drivers/gpu/drm/nvdla/nvdla_pdp.c | 448 ++ > drivers/gpu/drm/nvdla/nvdla_reg.h | 6411 +++++++++++++++++++++++ > drivers/gpu/drm/nvdla/nvdla_rubik.c | 214 + > drivers/gpu/drm/nvdla/nvdla_sched.h | 37 + > drivers/gpu/drm/nvdla/nvdla_scheduler.c | 1012 ++++ > drivers/gpu/drm/nvdla/nvdla_sdp.c | 723 +++ > include/uapi/drm/nvdla_drm.h | 99 + > 23 files changed, 13176 insertions(+) > create mode 100644 drivers/gpu/drm/nvdla/Kconfig > create mode 100644 drivers/gpu/drm/nvdla/Makefile > create mode 100644 drivers/gpu/drm/nvdla/nvdla_bdma.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_cache.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_cdp.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.h > create mode 100644 drivers/gpu/drm/nvdla/nvdla_conv.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.h > create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.h > create mode 100644 drivers/gpu/drm/nvdla/nvdla_gem.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_pdp.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_reg.h > create mode 100644 drivers/gpu/drm/nvdla/nvdla_rubik.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_sched.h > create mode 100644 drivers/gpu/drm/nvdla/nvdla_scheduler.c > create mode 100644 drivers/gpu/drm/nvdla/nvdla_sdp.c > create mode 100644 include/uapi/drm/nvdla_drm.h > > -- > 2.25.1 >
On 4/28/22 17:10, Thierry Reding wrote: > On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: >> The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP >> which is integrated into NVIDIA Jetson AGX Xavier, >> so add driver support for this accelerator." > > Hi, > > nice to see this work going on. For subsequent revisions, can you please > also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as > the Tegra platform maintainers (that's Jon Hunter and myself). This will > make sure that more people with an interest in this will see your work. > Not everyone follows dri-devel, linaro-mm-sig or linux-media. > > Thanks, > Thierry From a quick glance it looks like this driver pokes DLA hardware directly which is not the intended programming model on Tegra hardware (there are Falcon microcontrollers that offload task scheduling and synchronization from the CPU). The hardware is also behind the Host1x bus so a simple platform device is not sufficient. Was this driver developed against some platform with OpenDLA hardware (i.e. not Tegra)? If so, we'd need to verify if the hardware matches the hardware in Tegra194. Also, this driver may not be ideal for Tegra platforms since we would lack the hardware scheduling and synchronization facilities. It is likely necessary to have separate drivers for OpenDLA and Tegra's DLA integration. Thanks, Mikko > >> >> v1->v2: >> *Rename nvdla_drm.[ch] to nvdla_drv.[ch] and rename nvdla_ioctl.h to nvdla_drm.h, >> move it to uapi. >> comments link: https://lore.kernel.org/lkml/20bac605-97e6-e5cd-c4e4-83a8121645d8@amd.com/ >> *Remove the onexistent filename in Makefile >> comments link: https://lore.kernel.org/lkml/202204201512.pp20MXT5-lkp@intel.com/ >> *Sort file names alphabetically in Makefile. >> *Rearrange the error messages, and use drm_err/_dbg() instead of pr_err/_dbg(). >> *Replace "dla_" prefix with "nvdla_" >> *Check the iosys_map by iosys_map_is_null(), and check "ret" directly. >> *Using iosys_map_memcpy_to/_from() for iosys_map instead of memcpy() >> *Fix parameter error "dma_buf_vunmap(buf, ptr)", use "&map" instead of "ptr" >> *Use iosys_map instead of kvaddr and use "iosys_map_set_vaddr()" to initialize iosys_map >> *Using "vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node)" to update vm_pgoff is cleaner >> *Remove the unused nvdla_drm_gem_mmap, register drm_gem_mmap to file_operations directly. >> *Use DEFINE_DRM_GEM_FOPS() to define nvdla_drm_fops. >> *Remove the unused nvdla_drm_gem_mmap_buf, register drm_gem_prime_mmap to drm_driver directly. >> comments link: https://lore.kernel.org/lkml/7fa19996-5830-af3d-ab24-08c76e1d5604@suse.de/ >> *Fix typo and some code style >> *Remove unused function nvdla_get_time_us() >> comments link: https://lore.kernel.org/lkml/0fa9ab41-c18e-a569-e6fe-a0e9d965905e@stargateuniverse.net/ >> >> Cai Huoqing (4): >> MAINTAINERS: Add the driver info of the NVDLA >> drm/nvdla: Add driver support for NVDLA >> drm/nvdla: Add register head file of NVDLA >> drm/nvdla/uapi: Add UAPI of NVDLA driver >> >> MAINTAINERS | 7 + >> drivers/gpu/drm/Kconfig | 2 + >> drivers/gpu/drm/Makefile | 1 + >> drivers/gpu/drm/nvdla/Kconfig | 8 + >> drivers/gpu/drm/nvdla/Makefile | 17 + >> drivers/gpu/drm/nvdla/nvdla_bdma.c | 198 + >> drivers/gpu/drm/nvdla/nvdla_cache.c | 202 + >> drivers/gpu/drm/nvdla/nvdla_cdp.c | 299 ++ >> drivers/gpu/drm/nvdla/nvdla_common.c | 293 ++ >> drivers/gpu/drm/nvdla/nvdla_common.h | 835 +++ >> drivers/gpu/drm/nvdla/nvdla_conv.c | 684 +++ >> drivers/gpu/drm/nvdla/nvdla_drv.c | 694 +++ >> drivers/gpu/drm/nvdla/nvdla_drv.h | 129 + >> drivers/gpu/drm/nvdla/nvdla_engine.c | 233 + >> drivers/gpu/drm/nvdla/nvdla_engine.h | 272 + >> drivers/gpu/drm/nvdla/nvdla_gem.c | 358 ++ >> drivers/gpu/drm/nvdla/nvdla_pdp.c | 448 ++ >> drivers/gpu/drm/nvdla/nvdla_reg.h | 6411 +++++++++++++++++++++++ >> drivers/gpu/drm/nvdla/nvdla_rubik.c | 214 + >> drivers/gpu/drm/nvdla/nvdla_sched.h | 37 + >> drivers/gpu/drm/nvdla/nvdla_scheduler.c | 1012 ++++ >> drivers/gpu/drm/nvdla/nvdla_sdp.c | 723 +++ >> include/uapi/drm/nvdla_drm.h | 99 + >> 23 files changed, 13176 insertions(+) >> create mode 100644 drivers/gpu/drm/nvdla/Kconfig >> create mode 100644 drivers/gpu/drm/nvdla/Makefile >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_bdma.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_cache.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_cdp.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.h >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_conv.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.h >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.h >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_gem.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_pdp.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_reg.h >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_rubik.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_sched.h >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_scheduler.c >> create mode 100644 drivers/gpu/drm/nvdla/nvdla_sdp.c >> create mode 100644 include/uapi/drm/nvdla_drm.h >> >> -- >> 2.25.1 >>
On 28/04/2022 16:56, Mikko Perttunen wrote: > On 4/28/22 17:10, Thierry Reding wrote: >> On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: >>> The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP >>> which is integrated into NVIDIA Jetson AGX Xavier, >>> so add driver support for this accelerator." >> >> Hi, >> >> nice to see this work going on. For subsequent revisions, can you please >> also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as >> the Tegra platform maintainers (that's Jon Hunter and myself). This will >> make sure that more people with an interest in this will see your work. >> Not everyone follows dri-devel, linaro-mm-sig or linux-media. >> >> Thanks, >> Thierry > > From a quick glance it looks like this driver pokes DLA hardware > directly which is not the intended programming model on Tegra hardware > (there are Falcon microcontrollers that offload task scheduling and > synchronization from the CPU). The hardware is also behind the Host1x > bus so a simple platform device is not sufficient. > > Was this driver developed against some platform with OpenDLA hardware > (i.e. not Tegra)? > > If so, we'd need to verify if the hardware matches the hardware in > Tegra194. Also, this driver may not be ideal for Tegra platforms since > we would lack the hardware scheduling and synchronization facilities. It > is likely necessary to have separate drivers for OpenDLA and Tegra's DLA > integration. I believe that this is derived from the following github project ... https://github.com/nvdla/sw Jon
On 28 4月 22 18:56:07, Mikko Perttunen wrote: > On 4/28/22 17:10, Thierry Reding wrote: > > On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: > > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > > > which is integrated into NVIDIA Jetson AGX Xavier, > > > so add driver support for this accelerator." > > > > Hi, > > > > nice to see this work going on. For subsequent revisions, can you please > > also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as > > the Tegra platform maintainers (that's Jon Hunter and myself). This will > > make sure that more people with an interest in this will see your work. > > Not everyone follows dri-devel, linaro-mm-sig or linux-media. > > > > Thanks, > > Thierry > > From a quick glance it looks like this driver pokes DLA hardware directly > which is not the intended programming model on Tegra hardware (there are > Falcon microcontrollers that offload task scheduling and synchronization > from the CPU). The hardware is also behind the Host1x bus so a simple > platform device is not sufficient. > > Was this driver developed against some platform with OpenDLA hardware (i.e. > not Tegra)? > > If so, we'd need to verify if the hardware matches the hardware in Tegra194. > Also, this driver may not be ideal for Tegra platforms since we would lack > the hardware scheduling and synchronization facilities. It is likely > necessary to have separate drivers for OpenDLA and Tegra's DLA integration. > > Thanks, > Mikko > Tegra DLA seems to work with a slave coprocessor, the host driver just impelement message queue, share buffer, notification... The hardware detail of DLA maybe in the slave driver(not linux OS?). Sure, This driver just support for the SOCs or FPGAs that OPENDLA inside. I will change this kind of description "integrated into NVIDIA Jetson AGX Xavier" this driver dont support for Tegra directly. Thanks, Cai > > > > > > > > v1->v2: > > > *Rename nvdla_drm.[ch] to nvdla_drv.[ch] and rename nvdla_ioctl.h to nvdla_drm.h, > > > move it to uapi. > > > comments link: https://lore.kernel.org/lkml/20bac605-97e6-e5cd-c4e4-83a8121645d8@amd.com/ > > > *Remove the onexistent filename in Makefile > > > comments link: https://lore.kernel.org/lkml/202204201512.pp20MXT5-lkp@intel.com/ > > > *Sort file names alphabetically in Makefile. > > > *Rearrange the error messages, and use drm_err/_dbg() instead of pr_err/_dbg(). > > > *Replace "dla_" prefix with "nvdla_" > > > *Check the iosys_map by iosys_map_is_null(), and check "ret" directly. > > > *Using iosys_map_memcpy_to/_from() for iosys_map instead of memcpy() > > > *Fix parameter error "dma_buf_vunmap(buf, ptr)", use "&map" instead of "ptr" > > > *Use iosys_map instead of kvaddr and use "iosys_map_set_vaddr()" to initialize iosys_map > > > *Using "vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node)" to update vm_pgoff is cleaner > > > *Remove the unused nvdla_drm_gem_mmap, register drm_gem_mmap to file_operations directly. > > > *Use DEFINE_DRM_GEM_FOPS() to define nvdla_drm_fops. > > > *Remove the unused nvdla_drm_gem_mmap_buf, register drm_gem_prime_mmap to drm_driver directly. > > > comments link: https://lore.kernel.org/lkml/7fa19996-5830-af3d-ab24-08c76e1d5604@suse.de/ > > > *Fix typo and some code style > > > *Remove unused function nvdla_get_time_us() > > > comments link: https://lore.kernel.org/lkml/0fa9ab41-c18e-a569-e6fe-a0e9d965905e@stargateuniverse.net/ > > > > > > Cai Huoqing (4): > > > MAINTAINERS: Add the driver info of the NVDLA > > > drm/nvdla: Add driver support for NVDLA > > > drm/nvdla: Add register head file of NVDLA > > > drm/nvdla/uapi: Add UAPI of NVDLA driver > > > > > > MAINTAINERS | 7 + > > > drivers/gpu/drm/Kconfig | 2 + > > > drivers/gpu/drm/Makefile | 1 + > > > drivers/gpu/drm/nvdla/Kconfig | 8 + > > > drivers/gpu/drm/nvdla/Makefile | 17 + > > > drivers/gpu/drm/nvdla/nvdla_bdma.c | 198 + > > > drivers/gpu/drm/nvdla/nvdla_cache.c | 202 + > > > drivers/gpu/drm/nvdla/nvdla_cdp.c | 299 ++ > > > drivers/gpu/drm/nvdla/nvdla_common.c | 293 ++ > > > drivers/gpu/drm/nvdla/nvdla_common.h | 835 +++ > > > drivers/gpu/drm/nvdla/nvdla_conv.c | 684 +++ > > > drivers/gpu/drm/nvdla/nvdla_drv.c | 694 +++ > > > drivers/gpu/drm/nvdla/nvdla_drv.h | 129 + > > > drivers/gpu/drm/nvdla/nvdla_engine.c | 233 + > > > drivers/gpu/drm/nvdla/nvdla_engine.h | 272 + > > > drivers/gpu/drm/nvdla/nvdla_gem.c | 358 ++ > > > drivers/gpu/drm/nvdla/nvdla_pdp.c | 448 ++ > > > drivers/gpu/drm/nvdla/nvdla_reg.h | 6411 +++++++++++++++++++++++ > > > drivers/gpu/drm/nvdla/nvdla_rubik.c | 214 + > > > drivers/gpu/drm/nvdla/nvdla_sched.h | 37 + > > > drivers/gpu/drm/nvdla/nvdla_scheduler.c | 1012 ++++ > > > drivers/gpu/drm/nvdla/nvdla_sdp.c | 723 +++ > > > include/uapi/drm/nvdla_drm.h | 99 + > > > 23 files changed, 13176 insertions(+) > > > create mode 100644 drivers/gpu/drm/nvdla/Kconfig > > > create mode 100644 drivers/gpu/drm/nvdla/Makefile > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_bdma.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_cache.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_cdp.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.h > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_conv.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_drv.h > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.h > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_gem.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_pdp.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_reg.h > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_rubik.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_sched.h > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_scheduler.c > > > create mode 100644 drivers/gpu/drm/nvdla/nvdla_sdp.c > > > create mode 100644 include/uapi/drm/nvdla_drm.h > > > > > > -- > > > 2.25.1 > > > >
On 28 4月 22 17:35:56, Jon Hunter wrote: > > On 28/04/2022 16:56, Mikko Perttunen wrote: > > On 4/28/22 17:10, Thierry Reding wrote: > > > On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: > > > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > > > > which is integrated into NVIDIA Jetson AGX Xavier, > > > > so add driver support for this accelerator." > > > > > > Hi, > > > > > > nice to see this work going on. For subsequent revisions, can you please > > > also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as > > > the Tegra platform maintainers (that's Jon Hunter and myself). This will > > > make sure that more people with an interest in this will see your work. > > > Not everyone follows dri-devel, linaro-mm-sig or linux-media. > > > > > > Thanks, > > > Thierry > > > > From a quick glance it looks like this driver pokes DLA hardware > > directly which is not the intended programming model on Tegra hardware > > (there are Falcon microcontrollers that offload task scheduling and > > synchronization from the CPU). The hardware is also behind the Host1x > > bus so a simple platform device is not sufficient. > > > > Was this driver developed against some platform with OpenDLA hardware > > (i.e. not Tegra)? > > > > If so, we'd need to verify if the hardware matches the hardware in > > Tegra194. Also, this driver may not be ideal for Tegra platforms since > > we would lack the hardware scheduling and synchronization facilities. It > > is likely necessary to have separate drivers for OpenDLA and Tegra's DLA > > integration. > > > I believe that this is derived from the following github project ... > > https://github.com/nvdla/sw > Sure, based on https://github.com/nvdla/sw The copyright retain in this driver, like "Copyright (C) 2017-2018 NVIDIA CORPORATION" Thanks Cai > Jon > > -- > nvpublic
On Fri, Apr 29, 2022 at 11:28:10AM +0800, Cai Huoqing wrote: > On 28 4月 22 18:56:07, Mikko Perttunen wrote: > > On 4/28/22 17:10, Thierry Reding wrote: > > > On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: > > > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > > > > which is integrated into NVIDIA Jetson AGX Xavier, > > > > so add driver support for this accelerator." > > > > > > Hi, > > > > > > nice to see this work going on. For subsequent revisions, can you please > > > also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as > > > the Tegra platform maintainers (that's Jon Hunter and myself). This will > > > make sure that more people with an interest in this will see your work. > > > Not everyone follows dri-devel, linaro-mm-sig or linux-media. > > > > > > Thanks, > > > Thierry > > > > From a quick glance it looks like this driver pokes DLA hardware directly > > which is not the intended programming model on Tegra hardware (there are > > Falcon microcontrollers that offload task scheduling and synchronization > > from the CPU). The hardware is also behind the Host1x bus so a simple > > platform device is not sufficient. > > > > Was this driver developed against some platform with OpenDLA hardware (i.e. > > not Tegra)? > > > > If so, we'd need to verify if the hardware matches the hardware in Tegra194. > > Also, this driver may not be ideal for Tegra platforms since we would lack > > the hardware scheduling and synchronization facilities. It is likely > > necessary to have separate drivers for OpenDLA and Tegra's DLA integration. > > > > Thanks, > > Mikko > > > Tegra DLA seems to work with a slave coprocessor, the host driver just > impelement message queue, share buffer, notification... The hardware > detail of DLA maybe in the slave driver(not linux OS?). > > Sure, This driver just support for the SOCs or FPGAs that OPENDLA > inside. I will change this kind of description "integrated into NVIDIA Jetson AGX Xavier" > this driver dont support for Tegra directly. Yes, I think it would be good to make it clear that this is not going to work with the Tegra instantiations so that people don't get confused. I think it would be ideal, though, if we could reuse as much of this driver as possible to work with other instantiations. The only reference to OpenDLA that I can find and which seems somehow relevant to this is here: https://github.com/SCLUO/ITRI-OpenDLA Is that the version that you're using? Or is the version that you're using at least compatible with that one? Apart from that and the Tegra instantiations, are you aware of any other derivatives that we need to account for? I'm worried that this might fragment to the point where it becomes unmaintainable in upstream Linux. Even if this doesn't concern the Tegra instantiation, I think most of my other comments remain valid. Things like global variables will get in the way of multiple FPGA instantiations as well, for example. You will also need to provide the device tree bindings for the particular instantiation that you're working on. Typically this would be identified by a vendor-specific compatible string for your particular board, but if it stems from a "canonical" FPGA mapping, matching on that compatible string might also be an option. In either case, when you send out the DT bindings, please include the devicetree@vger.kernel.org mailing list so that they can be properly reviewed. Thierry
On 02 5月 22 19:04:13, Thierry Reding wrote: > On Fri, Apr 29, 2022 at 11:28:10AM +0800, Cai Huoqing wrote: > > On 28 4月 22 18:56:07, Mikko Perttunen wrote: > > > On 4/28/22 17:10, Thierry Reding wrote: > > > > On Tue, Apr 26, 2022 at 02:07:57PM +0800, Cai Huoqing wrote: > > > > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > > > > > which is integrated into NVIDIA Jetson AGX Xavier, > > > > > so add driver support for this accelerator." > > > > > > > > Hi, > > > > > > > > nice to see this work going on. For subsequent revisions, can you please > > > > also Cc the Tegra mailing list (linux-tegra@vger.kernel.org) as well as > > > > the Tegra platform maintainers (that's Jon Hunter and myself). This will > > > > make sure that more people with an interest in this will see your work. > > > > Not everyone follows dri-devel, linaro-mm-sig or linux-media. > > > > > > > > Thanks, > > > > Thierry > > > > > > From a quick glance it looks like this driver pokes DLA hardware directly > > > which is not the intended programming model on Tegra hardware (there are > > > Falcon microcontrollers that offload task scheduling and synchronization > > > from the CPU). The hardware is also behind the Host1x bus so a simple > > > platform device is not sufficient. > > > > > > Was this driver developed against some platform with OpenDLA hardware (i.e. > > > not Tegra)? > > > > > > If so, we'd need to verify if the hardware matches the hardware in Tegra194. > > > Also, this driver may not be ideal for Tegra platforms since we would lack > > > the hardware scheduling and synchronization facilities. It is likely > > > necessary to have separate drivers for OpenDLA and Tegra's DLA integration. > > > > > > Thanks, > > > Mikko > > > > > Tegra DLA seems to work with a slave coprocessor, the host driver just > > impelement message queue, share buffer, notification... The hardware > > detail of DLA maybe in the slave driver(not linux OS?). > > > > Sure, This driver just support for the SOCs or FPGAs that OPENDLA > > inside. I will change this kind of description "integrated into NVIDIA Jetson AGX Xavier" > > this driver dont support for Tegra directly. > > Yes, I think it would be good to make it clear that this is not going to > work with the Tegra instantiations so that people don't get confused. > > I think it would be ideal, though, if we could reuse as much of this > driver as possible to work with other instantiations. The only reference > to OpenDLA that I can find and which seems somehow relevant to this is > here: > > https://github.com/SCLUO/ITRI-OpenDLA Hi, thanks for your reply. the hardware code here, https://github.com/caihuoq/nvdla-hw or https://github.com/nvdla/hw which includes cmodel, RTL. I also make a docker image to run cmodel simulator(based on qemu) https://github.com/caihuoq/nvdla_docker It can be used to check this driver. Thanks, Cai > > Is that the version that you're using? Or is the version that you're > using at least compatible with that one? Apart from that and the Tegra > instantiations, are you aware of any other derivatives that we need to > account for? I'm worried that this might fragment to the point where it > becomes unmaintainable in upstream Linux. > > Even if this doesn't concern the Tegra instantiation, I think most of my > other comments remain valid. Things like global variables will get in > the way of multiple FPGA instantiations as well, for example. > > You will also need to provide the device tree bindings for the > particular instantiation that you're working on. Typically this would be > identified by a vendor-specific compatible string for your particular > board, but if it stems from a "canonical" FPGA mapping, matching on that > compatible string might also be an option. In either case, when you send > out the DT bindings, please include the devicetree@vger.kernel.org > mailing list so that they can be properly reviewed. > > Thierry