diff mbox series

[5/7] arm64: dts: mediatek: mt8195-demo: enable ethernet

Message ID 20220426134106.242353-6-fparent@baylibre.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: mediatek: mt8195-demo: Add more peripheral support | expand

Commit Message

Fabien Parent April 26, 2022, 1:41 p.m. UTC
Enable ethernet on the MT8195 demo board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108 +++++++++++++++++++
 1 file changed, 108 insertions(+)

Comments

Macpaul Lin April 27, 2022, 6:25 a.m. UTC | #1
On Tue, 2022-04-26 at 15:41 +0200, Fabien Parent wrote:
> Enable ethernet on the MT8195 demo board.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108
> +++++++++++++++++++
>  1 file changed, 108 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> index 08cab3b3943b..0b7985486e2a 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 {
>  	};
>  };
>  
> +&eth {
> +	phy-mode = "rgmii-rxid";
> +	phy-handle = <&eth_phy>;
> +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> +	snps,reset-delays-us = <0 10000 10000>;
> +	mediatek,tx-delay-ps = <2030>;
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&eth_default_pins>;
> +	pinctrl-1 = <&eth_sleep_pins>;
> +	status = "okay";
> +
> +	mdio {
> +		compatible = "snps,dwmac-mdio";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		eth_phy: phy@1 {
> +			compatible = "ethernet-phy-id001c.c916";
> +			#phy-cells = <0>;
> +			reg = <0x1>;
> +		};
> +	};
> +};
> +
>  &i2c6 {
>  	clock-frequency = <400000>;
>  	pinctrl-0 = <&i2c6_pins>;
> @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg {
>  };
>  
>  &pio {
> +	eth_default_pins: eth-default-pins {
> +		pins-cc {
> +			pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
> +				 <PINMUX_GPIO88__FUNC_GBE_TXEN>,
> +				 <PINMUX_GPIO87__FUNC_GBE_RXDV>,
> +				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
> +			drive-strength = <MTK_DRIVE_8mA>;
> +		};
> +
> +		pins-mdio {
> +			pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
> +				 <PINMUX_GPIO90__FUNC_GBE_MDIO>;
> +			input-enable;
> +		};
> +
> +		pins-phy-reset {
> +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> +		};
> +
> +		pins-power {
> +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> +			output-high;
> +		};
> +
> +		pins-rxd {
> +			pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
> +				 <PINMUX_GPIO82__FUNC_GBE_RXD2>,
> +				 <PINMUX_GPIO83__FUNC_GBE_RXD1>,
> +				 <PINMUX_GPIO84__FUNC_GBE_RXD0>;
> +		};
> +
> +		pins-txd {
> +			pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
> +				 <PINMUX_GPIO78__FUNC_GBE_TXD2>,
> +				 <PINMUX_GPIO79__FUNC_GBE_TXD1>,
> +				 <PINMUX_GPIO80__FUNC_GBE_TXD0>;
> +			drive-strength = <MTK_DRIVE_8mA>;
> +		};
> +	};
> +
> +	eth_sleep_pins: eth-sleep-pins {
> +		pins-cc {
> +			pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
> +				 <PINMUX_GPIO88__FUNC_GPIO88>,
> +				 <PINMUX_GPIO87__FUNC_GPIO87>,
> +				 <PINMUX_GPIO86__FUNC_GPIO86>;
> +		};
> +
> +		pins-mdio {
> +			pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
> +				 <PINMUX_GPIO90__FUNC_GPIO90>;
> +			input-disable;
> +			bias-disable;
> +		};
> +
> +		pins-phy-reset {
> +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> +			input-disable;
> +			bias-disable;
> +		};
> +
> +		pins-power {
> +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> +			input-disable;
> +			bias-disable;
> +		};
> +
> +		pins-rxd {
> +			pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
> +				 <PINMUX_GPIO82__FUNC_GPIO82>,
> +				 <PINMUX_GPIO83__FUNC_GPIO83>,
> +				 <PINMUX_GPIO84__FUNC_GPIO84>;
> +		};
> +
> +		pins-txd {
> +			pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
> +				 <PINMUX_GPIO78__FUNC_GPIO78>,
> +				 <PINMUX_GPIO79__FUNC_GPIO79>,
> +				 <PINMUX_GPIO80__FUNC_GPIO80>;
> +		};
> +	};
> +
>  	gpio_keys_pins: gpio-keys-pins {
>  		pins {
>  			pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;

Tested-by: Macpaul Lin <macpaul.lin@mediatek.com>

Regards,
Macpaul Lin
Matthias Brugger April 29, 2022, 2 p.m. UTC | #2
On 27/04/2022 08:25, Macpaul Lin wrote:
> On Tue, 2022-04-26 at 15:41 +0200, Fabien Parent wrote:
>> Enable ethernet on the MT8195 demo board.
>>
>> Signed-off-by: Fabien Parent <fparent@baylibre.com>
>> ---
>>   arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108
>> +++++++++++++++++++
>>   1 file changed, 108 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
>> b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
>> index 08cab3b3943b..0b7985486e2a 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
>> +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
>> @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 {
>>   	};
>>   };
>>   
>> +&eth {
>> +	phy-mode = "rgmii-rxid";
>> +	phy-handle = <&eth_phy>;
>> +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
>> +	snps,reset-delays-us = <0 10000 10000>;
>> +	mediatek,tx-delay-ps = <2030>;
>> +	pinctrl-names = "default", "sleep";
>> +	pinctrl-0 = <&eth_default_pins>;
>> +	pinctrl-1 = <&eth_sleep_pins>;
>> +	status = "okay";
>> +
>> +	mdio {
>> +		compatible = "snps,dwmac-mdio";
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		eth_phy: phy@1 {
>> +			compatible = "ethernet-phy-id001c.c916";
>> +			#phy-cells = <0>;
>> +			reg = <0x1>;
>> +		};
>> +	};
>> +};
>> +
>>   &i2c6 {
>>   	clock-frequency = <400000>;
>>   	pinctrl-0 = <&i2c6_pins>;
>> @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg {
>>   };
>>   
>>   &pio {
>> +	eth_default_pins: eth-default-pins {
>> +		pins-cc {
>> +			pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
>> +				 <PINMUX_GPIO88__FUNC_GBE_TXEN>,
>> +				 <PINMUX_GPIO87__FUNC_GBE_RXDV>,
>> +				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
>> +			drive-strength = <MTK_DRIVE_8mA>;
>> +		};
>> +
>> +		pins-mdio {
>> +			pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
>> +				 <PINMUX_GPIO90__FUNC_GBE_MDIO>;
>> +			input-enable;
>> +		};
>> +
>> +		pins-phy-reset {
>> +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
>> +		};
>> +
>> +		pins-power {
>> +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
>> +				 <PINMUX_GPIO92__FUNC_GPIO92>;
>> +			output-high;
>> +		};
>> +
>> +		pins-rxd {
>> +			pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
>> +				 <PINMUX_GPIO82__FUNC_GBE_RXD2>,
>> +				 <PINMUX_GPIO83__FUNC_GBE_RXD1>,
>> +				 <PINMUX_GPIO84__FUNC_GBE_RXD0>;
>> +		};
>> +
>> +		pins-txd {
>> +			pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
>> +				 <PINMUX_GPIO78__FUNC_GBE_TXD2>,
>> +				 <PINMUX_GPIO79__FUNC_GBE_TXD1>,
>> +				 <PINMUX_GPIO80__FUNC_GBE_TXD0>;
>> +			drive-strength = <MTK_DRIVE_8mA>;
>> +		};
>> +	};
>> +
>> +	eth_sleep_pins: eth-sleep-pins {
>> +		pins-cc {
>> +			pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
>> +				 <PINMUX_GPIO88__FUNC_GPIO88>,
>> +				 <PINMUX_GPIO87__FUNC_GPIO87>,
>> +				 <PINMUX_GPIO86__FUNC_GPIO86>;
>> +		};
>> +
>> +		pins-mdio {
>> +			pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
>> +				 <PINMUX_GPIO90__FUNC_GPIO90>;
>> +			input-disable;
>> +			bias-disable;
>> +		};
>> +
>> +		pins-phy-reset {
>> +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
>> +			input-disable;
>> +			bias-disable;
>> +		};
>> +
>> +		pins-power {
>> +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
>> +				 <PINMUX_GPIO92__FUNC_GPIO92>;
>> +			input-disable;
>> +			bias-disable;
>> +		};
>> +
>> +		pins-rxd {
>> +			pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
>> +				 <PINMUX_GPIO82__FUNC_GPIO82>,
>> +				 <PINMUX_GPIO83__FUNC_GPIO83>,
>> +				 <PINMUX_GPIO84__FUNC_GPIO84>;
>> +		};
>> +
>> +		pins-txd {
>> +			pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
>> +				 <PINMUX_GPIO78__FUNC_GPIO78>,
>> +				 <PINMUX_GPIO79__FUNC_GPIO79>,
>> +				 <PINMUX_GPIO80__FUNC_GPIO80>;
>> +		};
>> +	};
>> +
>>   	gpio_keys_pins: gpio-keys-pins {
>>   		pins {
>>   			pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;
> 
> Tested-by: Macpaul Lin <macpaul.lin@mediatek.com>
> 

I get the following error:
Error: arch/arm64/boot/dts/mediatek/mt8195.dtsi:582.26-27 syntax error



How did you test?

Regards,
Matthias
Fabien Parent April 29, 2022, 3:22 p.m. UTC | #3
On Fri, Apr 29, 2022 at 04:00:32PM +0200, Matthias Brugger wrote:
> 
> 
> On 27/04/2022 08:25, Macpaul Lin wrote:
> > On Tue, 2022-04-26 at 15:41 +0200, Fabien Parent wrote:
> > > Enable ethernet on the MT8195 demo board.
> > > 
> > > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > > ---
> > >   arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108
> > > +++++++++++++++++++
> > >   1 file changed, 108 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > index 08cab3b3943b..0b7985486e2a 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 {
> > >   	};
> > >   };
> > > +&eth {
> > > +	phy-mode = "rgmii-rxid";
> > > +	phy-handle = <&eth_phy>;
> > > +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> > > +	snps,reset-delays-us = <0 10000 10000>;
> > > +	mediatek,tx-delay-ps = <2030>;
> > > +	pinctrl-names = "default", "sleep";
> > > +	pinctrl-0 = <&eth_default_pins>;
> > > +	pinctrl-1 = <&eth_sleep_pins>;
> > > +	status = "okay";
> > > +
> > > +	mdio {
> > > +		compatible = "snps,dwmac-mdio";
> > > +		#address-cells = <1>;
> > > +		#size-cells = <0>;
> > > +
> > > +		eth_phy: phy@1 {
> > > +			compatible = "ethernet-phy-id001c.c916";
> > > +			#phy-cells = <0>;
> > > +			reg = <0x1>;
> > > +		};
> > > +	};
> > > +};
> > > +
> > >   &i2c6 {
> > >   	clock-frequency = <400000>;
> > >   	pinctrl-0 = <&i2c6_pins>;
> > > @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg {
> > >   };
> > >   &pio {
> > > +	eth_default_pins: eth-default-pins {
> > > +		pins-cc {
> > > +			pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
> > > +				 <PINMUX_GPIO88__FUNC_GBE_TXEN>,
> > > +				 <PINMUX_GPIO87__FUNC_GBE_RXDV>,
> > > +				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
> > > +			drive-strength = <MTK_DRIVE_8mA>;
> > > +		};
> > > +
> > > +		pins-mdio {
> > > +			pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
> > > +				 <PINMUX_GPIO90__FUNC_GBE_MDIO>;
> > > +			input-enable;
> > > +		};
> > > +
> > > +		pins-phy-reset {
> > > +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> > > +		};
> > > +
> > > +		pins-power {
> > > +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > +			output-high;
> > > +		};
> > > +
> > > +		pins-rxd {
> > > +			pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
> > > +				 <PINMUX_GPIO82__FUNC_GBE_RXD2>,
> > > +				 <PINMUX_GPIO83__FUNC_GBE_RXD1>,
> > > +				 <PINMUX_GPIO84__FUNC_GBE_RXD0>;
> > > +		};
> > > +
> > > +		pins-txd {
> > > +			pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
> > > +				 <PINMUX_GPIO78__FUNC_GBE_TXD2>,
> > > +				 <PINMUX_GPIO79__FUNC_GBE_TXD1>,
> > > +				 <PINMUX_GPIO80__FUNC_GBE_TXD0>;
> > > +			drive-strength = <MTK_DRIVE_8mA>;
> > > +		};
> > > +	};
> > > +
> > > +	eth_sleep_pins: eth-sleep-pins {
> > > +		pins-cc {
> > > +			pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
> > > +				 <PINMUX_GPIO88__FUNC_GPIO88>,
> > > +				 <PINMUX_GPIO87__FUNC_GPIO87>,
> > > +				 <PINMUX_GPIO86__FUNC_GPIO86>;
> > > +		};
> > > +
> > > +		pins-mdio {
> > > +			pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
> > > +				 <PINMUX_GPIO90__FUNC_GPIO90>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-phy-reset {
> > > +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-power {
> > > +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-rxd {
> > > +			pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
> > > +				 <PINMUX_GPIO82__FUNC_GPIO82>,
> > > +				 <PINMUX_GPIO83__FUNC_GPIO83>,
> > > +				 <PINMUX_GPIO84__FUNC_GPIO84>;
> > > +		};
> > > +
> > > +		pins-txd {
> > > +			pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
> > > +				 <PINMUX_GPIO78__FUNC_GPIO78>,
> > > +				 <PINMUX_GPIO79__FUNC_GPIO79>,
> > > +				 <PINMUX_GPIO80__FUNC_GPIO80>;
> > > +		};
> > > +	};
> > > +
> > >   	gpio_keys_pins: gpio-keys-pins {
> > >   		pins {
> > >   			pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;
> > 
> > Tested-by: Macpaul Lin <macpaul.lin@mediatek.com>
> > 
> 
> I get the following error:
> Error: arch/arm64/boot/dts/mediatek/mt8195.dtsi:582.26-27 syntax error

I think he used my upstreaming branch where I store the patches I sent
and will send to the mailing list: [0].

I forgot there is a dependency between this patch and [1], and I forgot
to test this patch serie independenly from the other commits from my
branch. I will make sure to not forget next time.

So from this patch serie, only patch 1-2, 6-7 can be applied since they
don't have any hidden dependency:
  dt-bindings: usb: mediatek,mtu3: add binding for MT8195 SoC
  arm64: dts: mediatek: mt8195: add ssusb support
  arm64: dts: mediatek: mt8195-demo: Remove input-name property
  arm64: dts: mediatek: mt8195-demo: enable uart1

[0] https://github.com/Fabo/linux/tree/mt8195-demo
[1] https://lore.kernel.org/all/20210615173233.26682-7-tinghan.shen@mediatek.com/

> 
> 
> 
> How did you test?
> 
> Regards,
> Matthias
Macpaul Lin May 6, 2022, 9:11 a.m. UTC | #4
On Fri, 2022-04-29 at 17:22 +0200, Fabien Parent wrote:
> On Fri, Apr 29, 2022 at 04:00:32PM +0200, Matthias Brugger wrote:
> > 
> > 
> > On 27/04/2022 08:25, Macpaul Lin wrote:
> > > On Tue, 2022-04-26 at 15:41 +0200, Fabien Parent wrote:
> > > > Enable ethernet on the MT8195 demo board.
> > > > 
> > > > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > > > ---
> > > >   arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108
> > > > +++++++++++++++++++
> > > >   1 file changed, 108 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > > b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > > index 08cab3b3943b..0b7985486e2a 100644
> > > > --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > > +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > > @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 {
> > > >   	};
> > > >   };
> > > > +&eth {
> > > > +	phy-mode = "rgmii-rxid";
> > > > +	phy-handle = <&eth_phy>;
> > > > +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> > > > +	snps,reset-delays-us = <0 10000 10000>;
> > > > +	mediatek,tx-delay-ps = <2030>;
> > > > +	pinctrl-names = "default", "sleep";
> > > > +	pinctrl-0 = <&eth_default_pins>;
> > > > +	pinctrl-1 = <&eth_sleep_pins>;
> > > > +	status = "okay";
> > > > +
> > > > +	mdio {
> > > > +		compatible = "snps,dwmac-mdio";
> > > > +		#address-cells = <1>;
> > > > +		#size-cells = <0>;
> > > > +
> > > > +		eth_phy: phy@1 {
> > > > +			compatible = "ethernet-phy-
> > > > id001c.c916";
> > > > +			#phy-cells = <0>;
> > > > +			reg = <0x1>;
> > > > +		};
> > > > +	};
> > > > +};
> > > > +
> > > >   &i2c6 {
> > > >   	clock-frequency = <400000>;
> > > >   	pinctrl-0 = <&i2c6_pins>;
> > > > @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg {
> > > >   };
> > > >   &pio {
> > > > +	eth_default_pins: eth-default-pins {
> > > > +		pins-cc {
> > > > +			pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
> > > > +				 <PINMUX_GPIO88__FUNC_GBE_TXEN>
> > > > ,
> > > > +				 <PINMUX_GPIO87__FUNC_GBE_RXDV>
> > > > ,
> > > > +				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
> > > > +			drive-strength = <MTK_DRIVE_8mA>;
> > > > +		};
> > > > +
> > > > +		pins-mdio {
> > > > +			pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
> > > > +				 <PINMUX_GPIO90__FUNC_GBE_MDIO>
> > > > ;
> > > > +			input-enable;
> > > > +		};
> > > > +
> > > > +		pins-phy-reset {
> > > > +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> > > > +		};
> > > > +
> > > > +		pins-power {
> > > > +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> > > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > > +			output-high;
> > > > +		};
> > > > +
> > > > +		pins-rxd {
> > > > +			pinmux =
> > > > <PINMUX_GPIO81__FUNC_GBE_RXD3>,
> > > > +				 <PINMUX_GPIO82__FUNC_GBE_RXD2>
> > > > ,
> > > > +				 <PINMUX_GPIO83__FUNC_GBE_RXD1>
> > > > ,
> > > > +				 <PINMUX_GPIO84__FUNC_GBE_RXD0>
> > > > ;
> > > > +		};
> > > > +
> > > > +		pins-txd {
> > > > +			pinmux =
> > > > <PINMUX_GPIO77__FUNC_GBE_TXD3>,
> > > > +				 <PINMUX_GPIO78__FUNC_GBE_TXD2>
> > > > ,
> > > > +				 <PINMUX_GPIO79__FUNC_GBE_TXD1>
> > > > ,
> > > > +				 <PINMUX_GPIO80__FUNC_GBE_TXD0>
> > > > ;
> > > > +			drive-strength = <MTK_DRIVE_8mA>;
> > > > +		};
> > > > +	};
> > > > +
> > > > +	eth_sleep_pins: eth-sleep-pins {
> > > > +		pins-cc {
> > > > +			pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
> > > > +				 <PINMUX_GPIO88__FUNC_GPIO88>,
> > > > +				 <PINMUX_GPIO87__FUNC_GPIO87>,
> > > > +				 <PINMUX_GPIO86__FUNC_GPIO86>;
> > > > +		};
> > > > +
> > > > +		pins-mdio {
> > > > +			pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
> > > > +				 <PINMUX_GPIO90__FUNC_GPIO90>;
> > > > +			input-disable;
> > > > +			bias-disable;
> > > > +		};
> > > > +
> > > > +		pins-phy-reset {
> > > > +			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
> > > > +			input-disable;
> > > > +			bias-disable;
> > > > +		};
> > > > +
> > > > +		pins-power {
> > > > +			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
> > > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > > +			input-disable;
> > > > +			bias-disable;
> > > > +		};
> > > > +
> > > > +		pins-rxd {
> > > > +			pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
> > > > +				 <PINMUX_GPIO82__FUNC_GPIO82>,
> > > > +				 <PINMUX_GPIO83__FUNC_GPIO83>,
> > > > +				 <PINMUX_GPIO84__FUNC_GPIO84>;
> > > > +		};
> > > > +
> > > > +		pins-txd {
> > > > +			pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
> > > > +				 <PINMUX_GPIO78__FUNC_GPIO78>,
> > > > +				 <PINMUX_GPIO79__FUNC_GPIO79>,
> > > > +				 <PINMUX_GPIO80__FUNC_GPIO80>;
> > > > +		};
> > > > +	};
> > > > +
> > > >   	gpio_keys_pins: gpio-keys-pins {
> > > >   		pins {
> > > >   			pinmux =
> > > > <PINMUX_GPIO106__FUNC_GPIO106>;
> > > 
> > > Tested-by: Macpaul Lin <macpaul.lin@mediatek.com>
> > > 
> > 
> > I get the following error:
> > Error: arch/arm64/boot/dts/mediatek/mt8195.dtsi:582.26-27 syntax
> > error
> 
> I think he used my upstreaming branch where I store the patches I
> sent
> and will send to the mailing list: [0].
> 
> I forgot there is a dependency between this patch and [1], and I
> forgot
> to test this patch serie independenly from the other commits from my
> branch. I will make sure to not forget next time.
> 
> So from this patch serie, only patch 1-2, 6-7 can be applied since
> they
> don't have any hidden dependency:
>   dt-bindings: usb: mediatek,mtu3: add binding for MT8195 SoC
>   arm64: dts: mediatek: mt8195: add ssusb support
>   arm64: dts: mediatek: mt8195-demo: Remove input-name property
>   arm64: dts: mediatek: mt8195-demo: enable uart1
> 
> [0] https://github.com/Fabo/linux/tree/mt8195-demo
> [1] 
> https://lore.kernel.org/all/20210615173233.26682-7-tinghan.shen@mediatek.com/
> 
> > 
> > 
> > 
> > How did you test?
> > 
> > Regards,
> > Matthias

Sorry for replying the mail late.

Actually, I've maintained a working tree based on 5.18-rc1 with minimum
changeset support booting to UART. Then pickup required patches for
testing individaul drivers. I should add the patch dependencies in
previous mail if there were a dependency list. However, attach a
dependency list might still be confusing since there is lots of patches
keep updating everyday for mediatek tree. I guess the best practice for
avoiding this kind of mess is using for-next tree to verify new patches
instead of using 5.18-rc1 tree since some of the dependencies were
already merged. Sorry for wasting your time.

I'll replace my local
working tree to Matthias's working tree for verifing these kind of
patches.

Thanks!
Macpaul Lin
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
index 08cab3b3943b..0b7985486e2a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
@@ -80,6 +80,30 @@  optee_reserved: optee@43200000 {
 	};
 };
 
+&eth {
+	phy-mode = "rgmii-rxid";
+	phy-handle = <&eth_phy>;
+	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
+	snps,reset-delays-us = <0 10000 10000>;
+	mediatek,tx-delay-ps = <2030>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&eth_default_pins>;
+	pinctrl-1 = <&eth_sleep_pins>;
+	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		eth_phy: phy@1 {
+			compatible = "ethernet-phy-id001c.c916";
+			#phy-cells = <0>;
+			reg = <0x1>;
+		};
+	};
+};
+
 &i2c6 {
 	clock-frequency = <400000>;
 	pinctrl-0 = <&i2c6_pins>;
@@ -260,6 +284,90 @@  &mt6359_vsram_others_ldo_reg {
 };
 
 &pio {
+	eth_default_pins: eth-default-pins {
+		pins-cc {
+			pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
+				 <PINMUX_GPIO88__FUNC_GBE_TXEN>,
+				 <PINMUX_GPIO87__FUNC_GBE_RXDV>,
+				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
+			drive-strength = <MTK_DRIVE_8mA>;
+		};
+
+		pins-mdio {
+			pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
+				 <PINMUX_GPIO90__FUNC_GBE_MDIO>;
+			input-enable;
+		};
+
+		pins-phy-reset {
+			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
+		};
+
+		pins-power {
+			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
+				 <PINMUX_GPIO92__FUNC_GPIO92>;
+			output-high;
+		};
+
+		pins-rxd {
+			pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
+				 <PINMUX_GPIO82__FUNC_GBE_RXD2>,
+				 <PINMUX_GPIO83__FUNC_GBE_RXD1>,
+				 <PINMUX_GPIO84__FUNC_GBE_RXD0>;
+		};
+
+		pins-txd {
+			pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
+				 <PINMUX_GPIO78__FUNC_GBE_TXD2>,
+				 <PINMUX_GPIO79__FUNC_GBE_TXD1>,
+				 <PINMUX_GPIO80__FUNC_GBE_TXD0>;
+			drive-strength = <MTK_DRIVE_8mA>;
+		};
+	};
+
+	eth_sleep_pins: eth-sleep-pins {
+		pins-cc {
+			pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
+				 <PINMUX_GPIO88__FUNC_GPIO88>,
+				 <PINMUX_GPIO87__FUNC_GPIO87>,
+				 <PINMUX_GPIO86__FUNC_GPIO86>;
+		};
+
+		pins-mdio {
+			pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
+				 <PINMUX_GPIO90__FUNC_GPIO90>;
+			input-disable;
+			bias-disable;
+		};
+
+		pins-phy-reset {
+			pinmux = <PINMUX_GPIO93__FUNC_GPIO93>;
+			input-disable;
+			bias-disable;
+		};
+
+		pins-power {
+			pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
+				 <PINMUX_GPIO92__FUNC_GPIO92>;
+			input-disable;
+			bias-disable;
+		};
+
+		pins-rxd {
+			pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
+				 <PINMUX_GPIO82__FUNC_GPIO82>,
+				 <PINMUX_GPIO83__FUNC_GPIO83>,
+				 <PINMUX_GPIO84__FUNC_GPIO84>;
+		};
+
+		pins-txd {
+			pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
+				 <PINMUX_GPIO78__FUNC_GPIO78>,
+				 <PINMUX_GPIO79__FUNC_GPIO79>,
+				 <PINMUX_GPIO80__FUNC_GPIO80>;
+		};
+	};
+
 	gpio_keys_pins: gpio-keys-pins {
 		pins {
 			pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;