| Message ID | 20220508104855.78804-7-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3,01/11] clk: qcom: ipq8074: fix NSS core PLL-s | expand |
On 08/05/2022 12:48, Robert Marko wrote: > GCC inside of IPQ8074 also provides power management via built-in GDSCs. > In order to do so, '#power-domain-cells' must be set to 1. > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > .../devicetree/bindings/clock/qcom,gcc-ipq8074.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml > index 98572b4a9b60..e3e236e4ce7d 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml > @@ -27,6 +27,9 @@ properties: > '#reset-cells': > const: 1 > > + '#power-domain-cells': > + const: 1 It seems I reviewed your v2 - please put it before reset-cells. The same in next hunks. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml index 98572b4a9b60..e3e236e4ce7d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml @@ -27,6 +27,9 @@ properties: '#reset-cells': const: 1 + '#power-domain-cells': + const: 1 + reg: maxItems: 1 @@ -39,6 +42,7 @@ required: - reg - '#clock-cells' - '#reset-cells' + - '#power-domain-cells' additionalProperties: false @@ -49,5 +53,6 @@ examples: reg = <0x01800000 0x80000>; #clock-cells = <1>; #reset-cells = <1>; + #power-domain-cells = <1>; }; ...
GCC inside of IPQ8074 also provides power management via built-in GDSCs. In order to do so, '#power-domain-cells' must be set to 1. Signed-off-by: Robert Marko <robimarko@gmail.com> --- .../devicetree/bindings/clock/qcom,gcc-ipq8074.yaml | 5 +++++ 1 file changed, 5 insertions(+)