Message ID | 20220510203359.92530-1-andi.shyti@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/gem: Flush TLBs for all the tiles | expand |
On 10/05/2022 21:33, Andi Shyti wrote: > During object cleanup we invalidate the TLBs but we do it only > for gt0. Invalidate the caches for all the tiles. > > Reported-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_pages.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c > index 97c820eee115a..444b9f96ba77c 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c > @@ -217,10 +217,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj) > > if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) { > struct drm_i915_private *i915 = to_i915(obj->base.dev); > - intel_wakeref_t wakeref; > + struct intel_gt *gt; > + int i; > > - with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref) > - intel_gt_invalidate_tlbs(to_gt(i915)); > + for_each_gt(gt, i915, i) { > + intel_wakeref_t w; > + > + with_intel_runtime_pm_if_active(gt->uncore->rpm, w) > + intel_gt_invalidate_tlbs(gt); > + } LGTM. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> How about an improvement, either immediately or as followup, to define per tile bound flags and so be able to avoid trashing innocent tiles? Like: i915_vma_bind: set_bit(I915_BO_WAS_BOUND_BIT(vma->vm->gt->info.id), &vma->obj->flags); __i915_gem_object_unset_pages: for_each_gt(gt, i915, i) { if (!test_and_clear_bit(I915_BO_WAS_BOUND_BIT(i), &obj->flags)) continue; ... } Regards, Tvrtko > } > > return pages;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c index 97c820eee115a..444b9f96ba77c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c @@ -217,10 +217,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj) if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) { struct drm_i915_private *i915 = to_i915(obj->base.dev); - intel_wakeref_t wakeref; + struct intel_gt *gt; + int i; - with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref) - intel_gt_invalidate_tlbs(to_gt(i915)); + for_each_gt(gt, i915, i) { + intel_wakeref_t w; + + with_intel_runtime_pm_if_active(gt->uncore->rpm, w) + intel_gt_invalidate_tlbs(gt); + } } return pages;
During object cleanup we invalidate the TLBs but we do it only for gt0. Invalidate the caches for all the tiles. Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)