| Message ID | 20220505115226.20130-10-rex-bc.chen@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | viresh kumar |
| Headers | show |
| Series | cpufreq: mediatek: Cleanup and support MT8183 and MT8186 | expand |
On Thu, May 5, 2022 at 8:04 PM Rex-BC Chen <rex-bc.chen@mediatek.com> wrote: > > Add MediaTek CCI devfreq node for MT8183. > > Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > index 8953dbf84f3e..7ac9864db9de 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > @@ -412,6 +412,10 @@ > > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > index 8d5bf73a9099..b035e06840e6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > @@ -230,6 +230,10 @@ > status = "okay"; > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index cecf96b628b7..11caf3dd85cd 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -280,6 +280,13 @@ > }; > }; > > + cci: cci { > + compatible = "mediatek,mt8183-cci"; > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > + clock-names = "cci_clock"; Binding says there should be two clocks: the actual clock that drives CCI, and a stable "intermediate" clock to switch to during clock rate changes. So I think this should look like: clocks = <&mcucfg CLK_MCU_BUS_SEL>, <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; clock-names = "cci", "intermediate"; ChenYu > + operating-points-v2 = <&cci_opp>; > + }; > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > -- > 2.18.0 > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Mon, 2022-05-16 at 13:35 +0800, Chen-Yu Tsai wrote: > On Thu, May 5, 2022 at 8:04 PM Rex-BC Chen <rex-bc.chen@mediatek.com> > wrote: > > > > Add MediaTek CCI devfreq node for MT8183. > > > > Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> > > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ > > arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ > > 3 files changed, 15 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > index 8953dbf84f3e..7ac9864db9de 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > @@ -412,6 +412,10 @@ > > > > }; > > > > +&cci { > > + proc-supply = <&mt6358_vproc12_reg>; > > +}; > > + > > &cpu0 { > > proc-supply = <&mt6358_vproc12_reg>; > > }; > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > > index 8d5bf73a9099..b035e06840e6 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > > @@ -230,6 +230,10 @@ > > status = "okay"; > > }; > > > > +&cci { > > + proc-supply = <&mt6358_vproc12_reg>; > > +}; > > + > > &cpu0 { > > proc-supply = <&mt6358_vproc12_reg>; > > }; > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index cecf96b628b7..11caf3dd85cd 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -280,6 +280,13 @@ > > }; > > }; > > > > + cci: cci { > > + compatible = "mediatek,mt8183-cci"; > > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > > + clock-names = "cci_clock"; > > Binding says there should be two clocks: the actual clock that drives > CCI, and a stable "intermediate" clock to switch to during clock rate > changes. So I think this should look like: > > clocks = <&mcucfg CLK_MCU_BUS_SEL>, > <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; > clock-names = "cci", "intermediate"; > > > ChenYu > Hello Chen-Yu, Thanks for your reminder. I will update this and sned next version. BRs, Rex > > + operating-points-v2 = <&cci_opp>; > > + }; > > + > > cpus { > > #address-cells = <1>; > > #size-cells = <0>; > > -- > > 2.18.0 > > > > > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 8953dbf84f3e..7ac9864db9de 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -412,6 +412,10 @@ }; +&cci { + proc-supply = <&mt6358_vproc12_reg>; +}; + &cpu0 { proc-supply = <&mt6358_vproc12_reg>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 8d5bf73a9099..b035e06840e6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -230,6 +230,10 @@ status = "okay"; }; +&cci { + proc-supply = <&mt6358_vproc12_reg>; +}; + &cpu0 { proc-supply = <&mt6358_vproc12_reg>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index cecf96b628b7..11caf3dd85cd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -280,6 +280,13 @@ }; }; + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; + clock-names = "cci_clock"; + operating-points-v2 = <&cci_opp>; + }; + cpus { #address-cells = <1>; #size-cells = <0>;