diff mbox series

[net-next,v4,05/12] dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch

Message ID 20220509131900.7840-6-clement.leger@bootlin.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series add support for Renesas RZ/N1 ethernet subsystem devices | expand

Commit Message

Clément Léger May 9, 2022, 1:18 p.m. UTC
Add bindings for Renesas RZ/N1 Advanced 5 port switch. This switch is
present on Renesas RZ/N1 SoC and was probably provided by MoreThanIP.
This company does not exists anymore and has been bought by Synopsys.
Since this IP can't be find anymore in the Synospsy portfolio, lets use
Renesas as the vendor compatible for this IP.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
 .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  | 132 ++++++++++++++++++
 1 file changed, 132 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml

Comments

Rob Herring May 11, 2022, 3:22 p.m. UTC | #1
On Mon, May 09, 2022 at 03:18:53PM +0200, Clément Léger wrote:
> Add bindings for Renesas RZ/N1 Advanced 5 port switch. This switch is
> present on Renesas RZ/N1 SoC and was probably provided by MoreThanIP.
> This company does not exists anymore and has been bought by Synopsys.
> Since this IP can't be find anymore in the Synospsy portfolio, lets use
> Renesas as the vendor compatible for this IP.
> 
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
>  .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  | 132 ++++++++++++++++++
>  1 file changed, 132 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
> new file mode 100644
> index 000000000000..f0f6748e1f01
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
> @@ -0,0 +1,132 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/N1 Advanced 5 ports ethernet switch
> +
> +maintainers:
> +  - Clément Léger <clement.leger@bootlin.com>
> +
> +description: |
> +  The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
> +  handles 4 ports + 1 CPU management port.
> +
> +allOf:
> +  - $ref: dsa.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - renesas,r9a06g032-a5psw
> +      - const: renesas,rzn1-a5psw
> +
> +  reg:
> +    maxItems: 1
> +
> +  mdio:
> +    $ref: /schemas/net/mdio.yaml#
> +    unevaluatedProperties: false
> +
> +  clocks:
> +    items:
> +      - description: AHB clock used for the switch register interface
> +      - description: Switch system clock
> +
> +  clock-names:
> +    items:
> +      - const: hclk
> +      - const: clk
> +
> +patternProperties:
> +  "^ethernet-ports$":

Move to 'properties', not a pattern.

With that,

Reviewed-by: Rob Herring <robh@kernel.org>
Vladimir Oltean May 11, 2022, 3:33 p.m. UTC | #2
On Wed, May 11, 2022 at 10:22:21AM -0500, Rob Herring wrote:
> > +patternProperties:
> > +  "^ethernet-ports$":
> 
> Move to 'properties', not a pattern.
> 
> With that,
> 
> Reviewed-by: Rob Herring <robh@kernel.org>

Even if it should have been "^(ethernet-)?ports$"?
Rob Herring May 18, 2022, 1:59 a.m. UTC | #3
On Wed, May 11, 2022 at 06:33:37PM +0300, Vladimir Oltean wrote:
> On Wed, May 11, 2022 at 10:22:21AM -0500, Rob Herring wrote:
> > > +patternProperties:
> > > +  "^ethernet-ports$":
> > 
> > Move to 'properties', not a pattern.
> > 
> > With that,
> > 
> > Reviewed-by: Rob Herring <robh@kernel.org>
> 
> Even if it should have been "^(ethernet-)?ports$"?

Why? Allowing 'ports' is for existing users. New ones don't need the 
variability and should use just 'ethernet-ports'.

Rob
Vladimir Oltean May 18, 2022, 12:05 p.m. UTC | #4
On Tue, May 17, 2022 at 08:59:24PM -0500, Rob Herring wrote:
> On Wed, May 11, 2022 at 06:33:37PM +0300, Vladimir Oltean wrote:
> > On Wed, May 11, 2022 at 10:22:21AM -0500, Rob Herring wrote:
> > > > +patternProperties:
> > > > +  "^ethernet-ports$":
> > > 
> > > Move to 'properties', not a pattern.
> > > 
> > > With that,
> > > 
> > > Reviewed-by: Rob Herring <robh@kernel.org>
> > 
> > Even if it should have been "^(ethernet-)?ports$"?
> 
> Why? Allowing 'ports' is for existing users. New ones don't need the 
> variability and should use just 'ethernet-ports'.
> 
> Rob

Yeah, ok, somehow the memo that new DSA drivers shouldn't support "ports"
didn't reach me. They invariably will though, since the DSA framework is
the main parser of the property, and that is shared by both old and new
drivers.
Clément Léger May 18, 2022, 12:41 p.m. UTC | #5
Le Wed, 18 May 2022 15:05:03 +0300,
Vladimir Oltean <olteanv@gmail.com> a écrit :

> On Tue, May 17, 2022 at 08:59:24PM -0500, Rob Herring wrote:
> > On Wed, May 11, 2022 at 06:33:37PM +0300, Vladimir Oltean wrote:  
> > > On Wed, May 11, 2022 at 10:22:21AM -0500, Rob Herring wrote:  
> > > > > +patternProperties:
> > > > > +  "^ethernet-ports$":  
> > > > 
> > > > Move to 'properties', not a pattern.
> > > > 
> > > > With that,
> > > > 
> > > > Reviewed-by: Rob Herring <robh@kernel.org>  
> > > 
> > > Even if it should have been "^(ethernet-)?ports$"?  
> > 
> > Why? Allowing 'ports' is for existing users. New ones don't need the 
> > variability and should use just 'ethernet-ports'.
> > 
> > Rob  
> 
> Yeah, ok, somehow the memo that new DSA drivers shouldn't support "ports"
> didn't reach me. They invariably will though, since the DSA framework is
> the main parser of the property, and that is shared by both old and new
> drivers.

Should also the subnodes of "ethernet-ports" use the
"ethernet-port@[0-9]*" naming ? Or keeping the existing pattern is ok
(ie "^(ethernet-)?port@[0-4]$") ?

Thanks,
Rob Herring May 18, 2022, 6:53 p.m. UTC | #6
On Wed, May 18, 2022 at 02:41:11PM +0200, Clément Léger wrote:
> Le Wed, 18 May 2022 15:05:03 +0300,
> Vladimir Oltean <olteanv@gmail.com> a écrit :
> 
> > On Tue, May 17, 2022 at 08:59:24PM -0500, Rob Herring wrote:
> > > On Wed, May 11, 2022 at 06:33:37PM +0300, Vladimir Oltean wrote:  
> > > > On Wed, May 11, 2022 at 10:22:21AM -0500, Rob Herring wrote:  
> > > > > > +patternProperties:
> > > > > > +  "^ethernet-ports$":  
> > > > > 
> > > > > Move to 'properties', not a pattern.
> > > > > 
> > > > > With that,
> > > > > 
> > > > > Reviewed-by: Rob Herring <robh@kernel.org>  
> > > > 
> > > > Even if it should have been "^(ethernet-)?ports$"?  
> > > 
> > > Why? Allowing 'ports' is for existing users. New ones don't need the 
> > > variability and should use just 'ethernet-ports'.
> > > 
> > > Rob  
> > 
> > Yeah, ok, somehow the memo that new DSA drivers shouldn't support "ports"
> > didn't reach me. They invariably will though, since the DSA framework is
> > the main parser of the property, and that is shared by both old and new
> > drivers.
> 
> Should also the subnodes of "ethernet-ports" use the
> "ethernet-port@[0-9]*" naming ? Or keeping the existing pattern is ok
> (ie "^(ethernet-)?port@[0-4]$") ?

I prefer the former, but care less. The whole reason for 'ethernet-' 
prefix is to make this distinct from the graph binding that uses ports 
and port.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
new file mode 100644
index 000000000000..f0f6748e1f01
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
@@ -0,0 +1,132 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/N1 Advanced 5 ports ethernet switch
+
+maintainers:
+  - Clément Léger <clement.leger@bootlin.com>
+
+description: |
+  The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
+  handles 4 ports + 1 CPU management port.
+
+allOf:
+  - $ref: dsa.yaml#
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - renesas,r9a06g032-a5psw
+      - const: renesas,rzn1-a5psw
+
+  reg:
+    maxItems: 1
+
+  mdio:
+    $ref: /schemas/net/mdio.yaml#
+    unevaluatedProperties: false
+
+  clocks:
+    items:
+      - description: AHB clock used for the switch register interface
+      - description: Switch system clock
+
+  clock-names:
+    items:
+      - const: hclk
+      - const: clk
+
+patternProperties:
+  "^ethernet-ports$":
+    type: object
+    properties:
+      '#address-cells':
+        const: 1
+      '#size-cells':
+        const: 0
+
+    patternProperties:
+      "^(ethernet-)?port@[0-6]$":
+        type: object
+        description: Ethernet switch ports
+
+        properties:
+          pcs-handle:
+            description:
+              phandle pointing to a PCS sub-node compatible with
+              renesas,rzn1-miic.yaml#
+            $ref: /schemas/types.yaml#/definitions/phandle
+
+unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/clock/r9a06g032-sysctrl.h>
+
+    switch@44050000 {
+        compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
+        reg = <0x44050000 0x10000>;
+        clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, <&sysctrl R9A06G032_CLK_SWITCH>;
+        clock-names = "hclk", "clk";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pins_mdio1>, <&pins_eth3>, <&pins_eth4>;
+
+        dsa,member = <0 0>;
+
+        ethernet-ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            port@0 {
+                reg = <0>;
+                label = "lan0";
+                phy-handle = <&switch0phy3>;
+                pcs-handle = <&mii_conv4>;
+            };
+
+            port@1 {
+                reg = <1>;
+                label = "lan1";
+                phy-handle = <&switch0phy1>;
+                pcs-handle = <&mii_conv3>;
+            };
+
+            port@4 {
+                reg = <4>;
+                ethernet = <&gmac1>;
+                label = "cpu";
+                fixed-link {
+                  speed = <1000>;
+                  full-duplex;
+                };
+            };
+        };
+
+        mdio {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            reset-gpios = <&gpio0a 2 GPIO_ACTIVE_HIGH>;
+            reset-delay-us = <15>;
+            clock-frequency = <2500000>;
+
+            switch0phy1: ethernet-phy@1{
+                reg = <1>;
+            };
+
+            switch0phy3: ethernet-phy@3{
+                reg = <3>;
+            };
+        };
+    };