| Message ID | 20220519084119.675990-2-judyhsiao@chromium.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add dtsi for sc7280 boards that using rt5682 codec | expand |
On Thu, May 19, 2022 at 08:41:17AM +0000, Judy Hsiao wrote: > Subject: arm64: dts: qcom: sc7280: Add drive strength property for secondary MI2S > > Add drive strength property for secondary MI2S on sc7280 based platforms That's not an accurate description, this patch only adjust settings for herobrine based boards. This should be reflected at list in the subject. Besides setting the drive strengths this patch also disables the pulls on some lines, so maybe better say something like "arm64: dts: qcom: sc7280: herobrine: Add pinconf settings for mi2s1". > Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> > --- > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > index 9cb1bc8ed6b5..6d8744e130b0 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > @@ -612,6 +612,20 @@ &dp_hot_plug_det { > bias-disable; > }; > > +&mi2s1_data0 { > + drive-strength = <6>; > + bias-disable; > +}; > + > +&mi2s1_sclk { > + drive-strength = <6>; > + bias-disable; > +}; > + > +&mi2s1_ws { > + drive-strength = <6>; > +}; > + > &pcie1_clkreq_n { > bias-pull-up; > drive-strength = <2>; > -- > 2.36.1.124.g0e6072fb45-goog >
Hi Judy,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on soc/for-next]
[also build test ERROR on v5.18-rc7]
[cannot apply to robh/for-next arm/for-next arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next shawnguo/for-next keystone/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Judy-Hsiao/Add-dtsi-for-sc7280-boards-that-using-rt5682-codec/20220519-164227
base: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20220520/202205201035.VNGXOfUp-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/b59ef0e3880c11efecbe61bebfe9352c76bf96f4
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Judy-Hsiao/Add-dtsi-for-sc7280-boards-that-using-rt5682-codec/20220519-164227
git checkout b59ef0e3880c11efecbe61bebfe9352c76bf96f4
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> Error: arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi:615.1-13 Label or path mi2s1_data0 not found
>> Error: arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi:620.1-12 Label or path mi2s1_sclk not found
>> Error: arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi:625.1-10 Label or path mi2s1_ws not found
FATAL ERROR: Syntax error parsing input tree
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index 9cb1bc8ed6b5..6d8744e130b0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -612,6 +612,20 @@ &dp_hot_plug_det { bias-disable; }; +&mi2s1_data0 { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength = <6>; +}; + &pcie1_clkreq_n { bias-pull-up; drive-strength = <2>;
Add drive strength property for secondary MI2S on sc7280 based platforms Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> --- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)