diff mbox series

[v2] gpio: sifive: Make the irqchip immutable

Message ID 26519be2a2fdd4c6741658144e3a8d78cf4d000b.1653042202.git.geert+renesas@glider.be (mailing list archive)
State New, archived
Headers show
Series [v2] gpio: sifive: Make the irqchip immutable | expand

Commit Message

Geert Uytterhoeven May 20, 2022, 10:24 a.m. UTC 
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the sifive driver:

    gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the sifive driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Against gpio/for-next.
Boot-tested on SiPEED MAiXBiT (Canaan K210).

v2:
  - Factor out hwirq using preferred helper.
---
 drivers/gpio/gpio-sifive.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

Comments

Andy Shevchenko May 20, 2022, 1:52 p.m. UTC | #1 
On Fri, May 20, 2022 at 12:34 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
>
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the sifive driver:
>
>     gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the sifive driver immutable.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
>
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-sifive.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
> index 03b8c4de2e91e3c4..238f3210970cfa0e 100644
> --- a/drivers/gpio/gpio-sifive.c
> +++ b/drivers/gpio/gpio-sifive.c
> @@ -75,10 +75,12 @@ static void sifive_gpio_irq_enable(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct sifive_gpio *chip = gpiochip_get_data(gc);
> -       int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
> +       int offset = hwirq % SIFIVE_GPIO_MAX;
>         u32 bit = BIT(offset);
>         unsigned long flags;
>
> +       gpiochip_enable_irq(gc, hwirq);
>         irq_chip_enable_parent(d);
>
>         /* Switch to input */
> @@ -101,11 +103,13 @@ static void sifive_gpio_irq_disable(struct irq_data *d)
>  {
>         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>         struct sifive_gpio *chip = gpiochip_get_data(gc);
> -       int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
> +       irq_hw_number_t hwirq = irqd_to_hwirq(d);
> +       int offset = hwirq % SIFIVE_GPIO_MAX;
>
>         assign_bit(offset, &chip->irq_state, 0);
>         sifive_gpio_set_ie(chip, offset);
>         irq_chip_disable_parent(d);
> +       gpiochip_disable_irq(gc, hwirq);
>  }
>
>  static void sifive_gpio_irq_eoi(struct irq_data *d)
> @@ -137,7 +141,7 @@ static int sifive_gpio_irq_set_affinity(struct irq_data *data,
>         return -EINVAL;
>  }
>
> -static struct irq_chip sifive_gpio_irqchip = {
> +static const struct irq_chip sifive_gpio_irqchip = {
>         .name           = "sifive-gpio",
>         .irq_set_type   = sifive_gpio_irq_set_type,
>         .irq_mask       = irq_chip_mask_parent,
> @@ -146,6 +150,8 @@ static struct irq_chip sifive_gpio_irqchip = {
>         .irq_disable    = sifive_gpio_irq_disable,
>         .irq_eoi        = sifive_gpio_irq_eoi,
>         .irq_set_affinity = sifive_gpio_irq_set_affinity,
> +       .flags          = IRQCHIP_IMMUTABLE,
> +       GPIOCHIP_IRQ_RESOURCE_HELPERS,
>  };
>
>  static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
> @@ -242,7 +248,7 @@ static int sifive_gpio_probe(struct platform_device *pdev)
>         chip->gc.parent = dev;
>         chip->gc.owner = THIS_MODULE;
>         girq = &chip->gc.irq;
> -       girq->chip = &sifive_gpio_irqchip;
> +       gpio_irq_chip_set_chip(girq, &sifive_gpio_irqchip);
>         girq->fwnode = of_node_to_fwnode(node);
>         girq->parent_domain = parent;
>         girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;
> --
> 2.25.1
>
Damien Le Moal May 20, 2022, 11:42 p.m. UTC | #2 
On 5/20/22 19:24, Geert Uytterhoeven wrote:
> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the sifive driver:
> 
>     gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it!
> 
> Fix this by making the irqchip in the sifive driver immutable.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against gpio/for-next.
> Boot-tested on SiPEED MAiXBiT (Canaan K210).
> 
> v2:
>   - Factor out hwirq using preferred helper.
> ---
>  drivers/gpio/gpio-sifive.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
> index 03b8c4de2e91e3c4..238f3210970cfa0e 100644
> --- a/drivers/gpio/gpio-sifive.c
> +++ b/drivers/gpio/gpio-sifive.c
> @@ -75,10 +75,12 @@ static void sifive_gpio_irq_enable(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct sifive_gpio *chip = gpiochip_get_data(gc);
> -	int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
> +	int offset = hwirq % SIFIVE_GPIO_MAX;
>  	u32 bit = BIT(offset);
>  	unsigned long flags;
>  
> +	gpiochip_enable_irq(gc, hwirq);
>  	irq_chip_enable_parent(d);
>  
>  	/* Switch to input */
> @@ -101,11 +103,13 @@ static void sifive_gpio_irq_disable(struct irq_data *d)
>  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
>  	struct sifive_gpio *chip = gpiochip_get_data(gc);
> -	int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(d);
> +	int offset = hwirq % SIFIVE_GPIO_MAX;
>  
>  	assign_bit(offset, &chip->irq_state, 0);
>  	sifive_gpio_set_ie(chip, offset);
>  	irq_chip_disable_parent(d);
> +	gpiochip_disable_irq(gc, hwirq);
>  }
>  
>  static void sifive_gpio_irq_eoi(struct irq_data *d)
> @@ -137,7 +141,7 @@ static int sifive_gpio_irq_set_affinity(struct irq_data *data,
>  	return -EINVAL;
>  }
>  
> -static struct irq_chip sifive_gpio_irqchip = {
> +static const struct irq_chip sifive_gpio_irqchip = {
>  	.name		= "sifive-gpio",
>  	.irq_set_type	= sifive_gpio_irq_set_type,
>  	.irq_mask	= irq_chip_mask_parent,
> @@ -146,6 +150,8 @@ static struct irq_chip sifive_gpio_irqchip = {
>  	.irq_disable	= sifive_gpio_irq_disable,
>  	.irq_eoi	= sifive_gpio_irq_eoi,
>  	.irq_set_affinity = sifive_gpio_irq_set_affinity,
> +	.flags		= IRQCHIP_IMMUTABLE,
> +	GPIOCHIP_IRQ_RESOURCE_HELPERS,
>  };
>  
>  static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
> @@ -242,7 +248,7 @@ static int sifive_gpio_probe(struct platform_device *pdev)
>  	chip->gc.parent = dev;
>  	chip->gc.owner = THIS_MODULE;
>  	girq = &chip->gc.irq;
> -	girq->chip = &sifive_gpio_irqchip;
> +	gpio_irq_chip_set_chip(girq, &sifive_gpio_irqchip);
>  	girq->fwnode = of_node_to_fwnode(node);
>  	girq->parent_domain = parent;
>  	girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;

Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
index 03b8c4de2e91e3c4..238f3210970cfa0e 100644
--- a/drivers/gpio/gpio-sifive.c
+++ b/drivers/gpio/gpio-sifive.c
@@ -75,10 +75,12 @@  static void sifive_gpio_irq_enable(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct sifive_gpio *chip = gpiochip_get_data(gc);
-	int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
+	int offset = hwirq % SIFIVE_GPIO_MAX;
 	u32 bit = BIT(offset);
 	unsigned long flags;
 
+	gpiochip_enable_irq(gc, hwirq);
 	irq_chip_enable_parent(d);
 
 	/* Switch to input */
@@ -101,11 +103,13 @@  static void sifive_gpio_irq_disable(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct sifive_gpio *chip = gpiochip_get_data(gc);
-	int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX;
+	irq_hw_number_t hwirq = irqd_to_hwirq(d);
+	int offset = hwirq % SIFIVE_GPIO_MAX;
 
 	assign_bit(offset, &chip->irq_state, 0);
 	sifive_gpio_set_ie(chip, offset);
 	irq_chip_disable_parent(d);
+	gpiochip_disable_irq(gc, hwirq);
 }
 
 static void sifive_gpio_irq_eoi(struct irq_data *d)
@@ -137,7 +141,7 @@  static int sifive_gpio_irq_set_affinity(struct irq_data *data,
 	return -EINVAL;
 }
 
-static struct irq_chip sifive_gpio_irqchip = {
+static const struct irq_chip sifive_gpio_irqchip = {
 	.name		= "sifive-gpio",
 	.irq_set_type	= sifive_gpio_irq_set_type,
 	.irq_mask	= irq_chip_mask_parent,
@@ -146,6 +150,8 @@  static struct irq_chip sifive_gpio_irqchip = {
 	.irq_disable	= sifive_gpio_irq_disable,
 	.irq_eoi	= sifive_gpio_irq_eoi,
 	.irq_set_affinity = sifive_gpio_irq_set_affinity,
+	.flags		= IRQCHIP_IMMUTABLE,
+	GPIOCHIP_IRQ_RESOURCE_HELPERS,
 };
 
 static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
@@ -242,7 +248,7 @@  static int sifive_gpio_probe(struct platform_device *pdev)
 	chip->gc.parent = dev;
 	chip->gc.owner = THIS_MODULE;
 	girq = &chip->gc.irq;
-	girq->chip = &sifive_gpio_irqchip;
+	gpio_irq_chip_set_chip(girq, &sifive_gpio_irqchip);
 	girq->fwnode = of_node_to_fwnode(node);
 	girq->parent_domain = parent;
 	girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq;