| Message ID | 20220519101806.18097-1-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: mailbox: mtk-gce: Convert txt to json-schema | expand |
On 19/05/2022 12:18, AngeloGioacchino Del Regno wrote: > Convert the mtk-gce documentation from freeform text format to a > json-schema. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../bindings/mailbox/mediatek,gce-mbox.yaml | 114 ++++++++++++++++++ > .../devicetree/bindings/mailbox/mtk-gce.txt | 82 ------------- > 2 files changed, 114 insertions(+), 82 deletions(-) > create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml > delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt > > diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml > new file mode 100644 > index 000000000000..750391b4038c > --- /dev/null > +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml > @@ -0,0 +1,114 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mbox.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek Global Command Engine (GCE) mailbox > + > +maintainers: > + - Houlong Wei <houlong.wei@mediatek.com> > + > +description: | > + The Global Command Engine (GCE) is used to help read/write registers > + with critical time limitation, such as updating display configuration > + during the vblank. > + The GCE can be used to implement the Command Queue (CMDQ) driver. Mention the headers in description. > + > +properties: > + compatible: > + enum: > + - mediatek,mt6779-gce > + - mediatek,mt8173-gce > + - mediatek,mt8183-gce > + - mediatek,mt8186-gce > + - mediatek,mt8192-gce > + - mediatek,mt8195-gce > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: gce > + > + '#mbox-cells': > + description: | > + The first cell describes the mailbox channel, which is the GCE Thread ID; > + The second cell describes the priority of the GCE thread. > + const: 2 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - '#mbox-cells' > + > +additionalProperties: false > + > +allOf: > + - if: > + properties: > + compatible: > + enum: > + - mediatek,mt8195-gce > + then: > + properties: > + clocks: > + maxItems: 2 Are you sure this works on mt8195-gce? > + > + clock-names: > + items: > + - const: gce0 > + - const: gce1 > + Best regards, Krzysztof
Il 20/05/22 10:15, Krzysztof Kozlowski ha scritto: > On 19/05/2022 12:18, AngeloGioacchino Del Regno wrote: >> Convert the mtk-gce documentation from freeform text format to a >> json-schema. >> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> --- >> .../bindings/mailbox/mediatek,gce-mbox.yaml | 114 ++++++++++++++++++ >> .../devicetree/bindings/mailbox/mtk-gce.txt | 82 ------------- >> 2 files changed, 114 insertions(+), 82 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >> delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt >> >> diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >> new file mode 100644 >> index 000000000000..750391b4038c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >> @@ -0,0 +1,114 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mbox.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: MediaTek Global Command Engine (GCE) mailbox >> + >> +maintainers: >> + - Houlong Wei <houlong.wei@mediatek.com> >> + >> +description: | >> + The Global Command Engine (GCE) is used to help read/write registers >> + with critical time limitation, such as updating display configuration >> + during the vblank. >> + The GCE can be used to implement the Command Queue (CMDQ) driver. > > Mention the headers in description. > Values for properties used by the GCE, such as sub-system IDs, thread priority and event IDs are defined in 'dt-bindings/gce/<chip>-gce.h'. Would that be enough, or should I list all of the headers? >> + >> +properties: >> + compatible: >> + enum: >> + - mediatek,mt6779-gce >> + - mediatek,mt8173-gce >> + - mediatek,mt8183-gce >> + - mediatek,mt8186-gce >> + - mediatek,mt8192-gce >> + - mediatek,mt8195-gce >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + items: >> + - const: gce >> + >> + '#mbox-cells': >> + description: | >> + The first cell describes the mailbox channel, which is the GCE Thread ID; >> + The second cell describes the priority of the GCE thread. >> + const: 2 >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - clocks >> + - clock-names >> + - '#mbox-cells' >> + >> +additionalProperties: false >> + >> +allOf: >> + - if: >> + properties: >> + compatible: >> + enum: >> + - mediatek,mt8195-gce >> + then: >> + properties: >> + clocks: >> + maxItems: 2 > > Are you sure this works on mt8195-gce? > Thanks for that, I've just rechecked the driver and.. no, that won't work for MT8195: it's just one clock there (like the others) and the clock names aren't even enforced, as the driver is always taking the clock at index 0. I got confused because the driver uses a slightly different kind of logic when probing on SoCs with multiple mailboxes, specifically: - For single mailbox, having a clock with name "gce" is enforced as it's grabbing it with devm_clk_get(dev, clk_name), where the clock name is declared in a string called "clk_name"; - For multiple mailboxes, it's looking for an of_alias, declared in an array of strings called "clk_names" and getting the clock with of_clk_get(node, 0). So there comes my confusion, recapping: static const char * const clk_name = "gce"; <- this is a clock name static const char * const clk_names[] = { "gce0", "gce1" }; <- OF alias names At this point, I think that the best idea would be to fix this issue first... luckily there's no MT8195 devicetree upstream yet, so I would technically not be breaking any ABI by changing it to be the same as the others. Easier explanation: plan is to change the driver such that we won't need anything different from the others in this schema. New version coming soon, then.... Regards, Angelo
On 24/05/2022 14:18, AngeloGioacchino Del Regno wrote: > Il 20/05/22 10:15, Krzysztof Kozlowski ha scritto: >> On 19/05/2022 12:18, AngeloGioacchino Del Regno wrote: >>> Convert the mtk-gce documentation from freeform text format to a >>> json-schema. >>> >>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >>> --- >>> .../bindings/mailbox/mediatek,gce-mbox.yaml | 114 ++++++++++++++++++ >>> .../devicetree/bindings/mailbox/mtk-gce.txt | 82 ------------- >>> 2 files changed, 114 insertions(+), 82 deletions(-) >>> create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt >>> >>> diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> new file mode 100644 >>> index 000000000000..750391b4038c >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> @@ -0,0 +1,114 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mbox.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: MediaTek Global Command Engine (GCE) mailbox >>> + >>> +maintainers: >>> + - Houlong Wei <houlong.wei@mediatek.com> >>> + >>> +description: | >>> + The Global Command Engine (GCE) is used to help read/write registers >>> + with critical time limitation, such as updating display configuration >>> + during the vblank. >>> + The GCE can be used to implement the Command Queue (CMDQ) driver. >> >> Mention the headers in description. >> > > Values for properties used by the GCE, such as sub-system IDs, thread > > priority and event IDs are defined in 'dt-bindings/gce/<chip>-gce.h'. > > Would that be enough, or should I list all of the headers? Yes. > >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - mediatek,mt6779-gce >>> + - mediatek,mt8173-gce >>> + - mediatek,mt8183-gce >>> + - mediatek,mt8186-gce >>> + - mediatek,mt8192-gce >>> + - mediatek,mt8195-gce >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + interrupts: >>> + maxItems: 1 >>> + >>> + clocks: >>> + maxItems: 1 >>> + >>> + clock-names: >>> + items: >>> + - const: gce >>> + >>> + '#mbox-cells': >>> + description: | >>> + The first cell describes the mailbox channel, which is the GCE Thread ID; >>> + The second cell describes the priority of the GCE thread. >>> + const: 2 >>> + >>> +required: >>> + - compatible >>> + - reg >>> + - interrupts >>> + - clocks >>> + - clock-names >>> + - '#mbox-cells' >>> + >>> +additionalProperties: false >>> + >>> +allOf: >>> + - if: >>> + properties: >>> + compatible: >>> + enum: >>> + - mediatek,mt8195-gce >>> + then: >>> + properties: >>> + clocks: >>> + maxItems: 2 >> >> Are you sure this works on mt8195-gce? >> > > Thanks for that, I've just rechecked the driver and.. no, that won't > work for MT8195: it's just one clock there (like the others) and the > clock names aren't even enforced, as the driver is always taking the > clock at index 0. I was not thinking about driver, although it's nice that my review helped in that. What I was mentioning, is your bindings behave correctly for mediatek,mt8195-gce DTS? You have maxItems:1 and maxItems:2, so usually it was failing, AFAIR. The same with clock-names - I think the schema should fail here. > > I got confused because the driver uses a slightly different kind of > logic when probing on SoCs with multiple mailboxes, specifically: > - For single mailbox, having a clock with name "gce" is enforced > as it's grabbing it with devm_clk_get(dev, clk_name), where the > clock name is declared in a string called "clk_name"; > - For multiple mailboxes, it's looking for an of_alias, declared > in an array of strings called "clk_names" and getting the clock > with of_clk_get(node, 0). > > > So there comes my confusion, recapping: > > static const char * const clk_name = "gce"; > <- this is a clock name > static const char * const clk_names[] = { "gce0", "gce1" }; <- OF alias names > > > At this point, I think that the best idea would be to fix this issue > first... luckily there's no MT8195 devicetree upstream yet, so I would > technically not be breaking any ABI by changing it to be the same as > the others. All this sounds a bit unrelated to the bindings. Anyway, gce for one case and gce0+gce1 for other, are okay, although schema looks a bit more complicated. See for example: https://lore.kernel.org/linux-devicetree/20220523181836.2019180-8-dmitry.baryshkov@linaro.org/ Best regards, Krzysztof
On 24/05/2022 14:18, AngeloGioacchino Del Regno wrote: > Il 20/05/22 10:15, Krzysztof Kozlowski ha scritto: >> On 19/05/2022 12:18, AngeloGioacchino Del Regno wrote: >>> Convert the mtk-gce documentation from freeform text format to a >>> json-schema. >>> >>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >>> --- >>> .../bindings/mailbox/mediatek,gce-mbox.yaml | 114 ++++++++++++++++++ >>> .../devicetree/bindings/mailbox/mtk-gce.txt | 82 ------------- >>> 2 files changed, 114 insertions(+), 82 deletions(-) >>> create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt >>> >>> diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> new file mode 100644 >>> index 000000000000..750391b4038c >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml >>> @@ -0,0 +1,114 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mbox.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: MediaTek Global Command Engine (GCE) mailbox >>> + >>> +maintainers: >>> + - Houlong Wei <houlong.wei@mediatek.com> >>> + >>> +description: | >>> + The Global Command Engine (GCE) is used to help read/write registers >>> + with critical time limitation, such as updating display configuration >>> + during the vblank. >>> + The GCE can be used to implement the Command Queue (CMDQ) driver. >> >> Mention the headers in description. >> > > Values for properties used by the GCE, such as sub-system IDs, thread > > priority and event IDs are defined in 'dt-bindings/gce/<chip>-gce.h'. > > Would that be enough, or should I list all of the headers? Yes. > >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - mediatek,mt6779-gce >>> + - mediatek,mt8173-gce >>> + - mediatek,mt8183-gce >>> + - mediatek,mt8186-gce >>> + - mediatek,mt8192-gce >>> + - mediatek,mt8195-gce >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + interrupts: >>> + maxItems: 1 >>> + >>> + clocks: >>> + maxItems: 1 >>> + >>> + clock-names: >>> + items: >>> + - const: gce >>> + >>> + '#mbox-cells': >>> + description: | >>> + The first cell describes the mailbox channel, which is the GCE Thread ID; >>> + The second cell describes the priority of the GCE thread. >>> + const: 2 >>> + >>> +required: >>> + - compatible >>> + - reg >>> + - interrupts >>> + - clocks >>> + - clock-names >>> + - '#mbox-cells' >>> + >>> +additionalProperties: false >>> + >>> +allOf: >>> + - if: >>> + properties: >>> + compatible: >>> + enum: >>> + - mediatek,mt8195-gce >>> + then: >>> + properties: >>> + clocks: >>> + maxItems: 2 >> >> Are you sure this works on mt8195-gce? >> > > Thanks for that, I've just rechecked the driver and.. no, that won't > work for MT8195: it's just one clock there (like the others) and the > clock names aren't even enforced, as the driver is always taking the > clock at index 0. I was not thinking about driver, although it's nice that my review helped in that. What I was mentioning, is your bindings behave correctly for mediatek,mt8195-gce DTS? You have maxItems:1 and maxItems:2, so usually it was failing, AFAIR. The same with clock-names - I think the schema should fail here. > > I got confused because the driver uses a slightly different kind of > logic when probing on SoCs with multiple mailboxes, specifically: > - For single mailbox, having a clock with name "gce" is enforced > as it's grabbing it with devm_clk_get(dev, clk_name), where the > clock name is declared in a string called "clk_name"; > - For multiple mailboxes, it's looking for an of_alias, declared > in an array of strings called "clk_names" and getting the clock > with of_clk_get(node, 0). > > > So there comes my confusion, recapping: > > static const char * const clk_name = "gce"; > <- this is a clock name > static const char * const clk_names[] = { "gce0", "gce1" }; <- OF alias names > > > At this point, I think that the best idea would be to fix this issue > first... luckily there's no MT8195 devicetree upstream yet, so I would > technically not be breaking any ABI by changing it to be the same as > the others. All this sounds a bit unrelated to the bindings. Anyway, gce for one case and gce0+gce1 for other, are okay, although schema looks a bit more complicated. See for example: https://lore.kernel.org/linux-devicetree/20220523181836.2019180-8-dmitry.baryshkov@linaro.org/ Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml new file mode 100644 index 000000000000..750391b4038c --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Global Command Engine (GCE) mailbox + +maintainers: + - Houlong Wei <houlong.wei@mediatek.com> + +description: | + The Global Command Engine (GCE) is used to help read/write registers + with critical time limitation, such as updating display configuration + during the vblank. + The GCE can be used to implement the Command Queue (CMDQ) driver. + +properties: + compatible: + enum: + - mediatek,mt6779-gce + - mediatek,mt8173-gce + - mediatek,mt8183-gce + - mediatek,mt8186-gce + - mediatek,mt8192-gce + - mediatek,mt8195-gce + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: gce + + '#mbox-cells': + description: | + The first cell describes the mailbox channel, which is the GCE Thread ID; + The second cell describes the priority of the GCE thread. + const: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - '#mbox-cells' + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + enum: + - mediatek,mt8195-gce + then: + properties: + clocks: + maxItems: 2 + + clock-names: + items: + - const: gce0 + - const: gce1 + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + gce: mailbox@10212000 { + compatible = "mediatek,mt8173-gce"; + reg = <0 0x10212000 0 0x1000>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + #mbox-cells = <2>; + }; + + /* Client device using a GCE Thread */ + mmsys: syscon@14000000 { + compatible = "mediatek,mt8173-mmsys", "syscon"; + reg = <0 0x14000000 0 0x1000>; + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, + <&gce 1 CMDQ_THR_PRIO_HIGHEST>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + /* Client device listening to specific GCE Events */ + mutex: mutex@14020000 { + compatible = "mediatek,mt8173-disp-mutex"; + reg = <0 0x14020000 0 0x1000>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm 1>; + clocks = <&mmsys CLK_MM_MUTEX_32K>; + mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>, + <CMDQ_EVENT_MUTEX1_STREAM_EOF>; + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt deleted file mode 100644 index c2aeba63bd47..000000000000 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ /dev/null @@ -1,82 +0,0 @@ -MediaTek GCE -=============== - -The Global Command Engine (GCE) is used to help read/write registers with -critical time limitation, such as updating display configuration during the -vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. - -CMDQ driver uses mailbox framework for communication. Please refer to -mailbox.txt for generic information about mailbox device-tree bindings. - -Required properties: -- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", - "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or - "mediatek,mt6779-gce". -- reg: Address range of the GCE unit -- interrupts: The interrupt signal from the GCE block -- clock: Clocks according to the common clock binding -- clock-names: Must be "gce" to stand for GCE clock -- #mbox-cells: Should be 2. - <&phandle channel priority> - phandle: Label name of a gce node. - channel: Channel of mailbox. Be equal to the thread id of GCE. - priority: Priority of GCE thread. - -Required properties for a client device: -- mboxes: Client use mailbox to communicate with GCE, it should have this - property and list of phandle, mailbox specifiers. -Optional properties for a client device: -- mediatek,gce-client-reg: Specify the sub-system id which is corresponding - to the register address, it should have this property and list of phandle, - sub-system specifiers. - <&phandle subsys_number start_offset size> - phandle: Label name of a gce node. - subsys_number: specify the sub-system id which is corresponding - to the register address. - start_offset: the start offset of register address that GCE can access. - size: the total size of register address that GCE can access. - -Optional properties for a client mutex node: -- mediatek,gce-events: GCE events used by clients. The event numbers are - defined in 'dt-bindings/gce/<chip>-gce.h'. - -Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', -'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h' -'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or -'dt-bindings/gce/mt6779-gce.h'. -Such as sub-system ids, thread priority, event ids. - -Example: - - gce: gce@10212000 { - compatible = "mediatek,mt8173-gce"; - reg = <0 0x10212000 0 0x1000>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; - clocks = <&infracfg CLK_INFRA_GCE>; - clock-names = "gce"; - #mbox-cells = <2>; - }; - -Example for a client device: - - mmsys: clock-controller@14000000 { - compatible = "mediatek,mt8173-mmsys"; - mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>, - <&gce 1 CMDQ_THR_PRIO_LOWEST>; - mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF - CMDQ_EVENT_MUTEX1_STREAM_EOF>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, - <&gce SUBSYS_1401XXXX 0x2000 0x100>; - ... - }; - -Example for a client mutex node: - mutex: mutex@14020000 { - compatible = "mediatek,mt8173-disp-mutex"; - reg = <0 0x14020000 0 0x1000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - clocks = <&mmsys CLK_MM_MUTEX_32K>; - mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>, - <CMDQ_EVENT_MUTEX1_STREAM_EOF>; - };
Convert the mtk-gce documentation from freeform text format to a json-schema. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../bindings/mailbox/mediatek,gce-mbox.yaml | 114 ++++++++++++++++++ .../devicetree/bindings/mailbox/mtk-gce.txt | 82 ------------- 2 files changed, 114 insertions(+), 82 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mbox.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt