| Message ID | 20220525145754.25866-9-alyssa.rosenzweig@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panfrost: Valhall (JM) support | expand |
On 25/05/2022 15:57, Alyssa Rosenzweig wrote: > Add the features, issues, and GPU ID for Mali-G57, a first-generation > Valhall GPU. Other first- and second-generation Valhall GPUs should be > similar. > > v2: Split out issue list for r0p0 from newer Natt GPUs, as TTRX_3485 was > fixed in r0p1. Unfortunately, MT8192 has a r0p0, so we do need to handle > TTRX_3485. > > Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> > --- > drivers/gpu/drm/panfrost/panfrost_features.h | 12 ++++++++++++ > drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 +++ > drivers/gpu/drm/panfrost/panfrost_issues.h | 9 +++++++++ > 3 files changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm/panfrost/panfrost_features.h > index 1a8bdebc86a3..7ed0cd3ea2d4 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_features.h > +++ b/drivers/gpu/drm/panfrost/panfrost_features.h > @@ -106,6 +106,18 @@ enum panfrost_hw_feature { > BIT_ULL(HW_FEATURE_TLS_HASHING) | \ > BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) > > +#define hw_features_g57 (\ > + BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ > + BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ > + BIT_ULL(HW_FEATURE_XAFFINITY) | \ > + BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ > + BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ > + BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ > + BIT_ULL(HW_FEATURE_COHERENCY_REG) | \ > + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \ > + BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \ > + BIT_ULL(HW_FEATURE_CLEAN_ONLY_SAFE)) > + > static inline bool panfrost_has_hw_feature(struct panfrost_device *pfdev, > enum panfrost_hw_feature feat) > { > diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c > index e1a6e763d0dc..6452e4e900dd 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c > +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c > @@ -201,6 +201,9 @@ static const struct panfrost_model gpu_models[] = { > GPU_MODEL(g52, 0x7002), > GPU_MODEL(g31, 0x7003, > GPU_REV(g31, 1, 0)), > + > + GPU_MODEL(g57, 0x9001, > + GPU_REV(g57, 0, 0)), > }; > > static void panfrost_gpu_init_features(struct panfrost_device *pfdev) > diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/panfrost/panfrost_issues.h > index 4d41e0a13867..c5fa9e897a35 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_issues.h > +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h > @@ -258,6 +258,15 @@ enum panfrost_hw_issue { > > #define hw_issues_g76 0 > > +#define hw_issues_g57 (\ > + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ > + BIT_ULL(HW_ISSUE_TTRX_3076)) > + > +#define hw_issues_g57_r0p0 (\ > + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ > + BIT_ULL(HW_ISSUE_TTRX_3076) | \ > + BIT_ULL(HW_ISSUE_TTRX_3485)) There's no need to repeat the issues that are generic for g57 in the r0p0 list. So this can be simplified to: #define hw_issues_g57_r0p0 (\ BIT_ULL(HW_ISSUE_TTRX_3485)) With that fixed: Reviewed-by: Steven Price <steven.price@arm.com> > + > static inline bool panfrost_has_hw_issue(const struct panfrost_device *pfdev, > enum panfrost_hw_issue issue) > {
diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm/panfrost/panfrost_features.h index 1a8bdebc86a3..7ed0cd3ea2d4 100644 --- a/drivers/gpu/drm/panfrost/panfrost_features.h +++ b/drivers/gpu/drm/panfrost/panfrost_features.h @@ -106,6 +106,18 @@ enum panfrost_hw_feature { BIT_ULL(HW_FEATURE_TLS_HASHING) | \ BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) +#define hw_features_g57 (\ + BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ + BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ + BIT_ULL(HW_FEATURE_XAFFINITY) | \ + BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ + BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ + BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ + BIT_ULL(HW_FEATURE_COHERENCY_REG) | \ + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \ + BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \ + BIT_ULL(HW_FEATURE_CLEAN_ONLY_SAFE)) + static inline bool panfrost_has_hw_feature(struct panfrost_device *pfdev, enum panfrost_hw_feature feat) { diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c index e1a6e763d0dc..6452e4e900dd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -201,6 +201,9 @@ static const struct panfrost_model gpu_models[] = { GPU_MODEL(g52, 0x7002), GPU_MODEL(g31, 0x7003, GPU_REV(g31, 1, 0)), + + GPU_MODEL(g57, 0x9001, + GPU_REV(g57, 0, 0)), }; static void panfrost_gpu_init_features(struct panfrost_device *pfdev) diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/panfrost/panfrost_issues.h index 4d41e0a13867..c5fa9e897a35 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -258,6 +258,15 @@ enum panfrost_hw_issue { #define hw_issues_g76 0 +#define hw_issues_g57 (\ + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ + BIT_ULL(HW_ISSUE_TTRX_3076)) + +#define hw_issues_g57_r0p0 (\ + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ + BIT_ULL(HW_ISSUE_TTRX_3076) | \ + BIT_ULL(HW_ISSUE_TTRX_3485)) + static inline bool panfrost_has_hw_issue(const struct panfrost_device *pfdev, enum panfrost_hw_issue issue) {
Add the features, issues, and GPU ID for Mali-G57, a first-generation Valhall GPU. Other first- and second-generation Valhall GPUs should be similar. v2: Split out issue list for r0p0 from newer Natt GPUs, as TTRX_3485 was fixed in r0p1. Unfortunately, MT8192 has a r0p0, so we do need to handle TTRX_3485. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> --- drivers/gpu/drm/panfrost/panfrost_features.h | 12 ++++++++++++ drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 +++ drivers/gpu/drm/panfrost/panfrost_issues.h | 9 +++++++++ 3 files changed, 24 insertions(+)