diff mbox series

[v2,7/9] drm/i915/rpm: Enable D3Cold VRAM SR Support

Message ID 20220616120106.24353-8-anshuman.gupta@intel.com (mailing list archive)
State New, archived
Headers show
Series DG2 VRAM_SR Support | expand

Commit Message

Gupta, Anshuman June 16, 2022, 12:01 p.m. UTC
Intel Client DGFX card supports D3Cold with two option.
D3Cold-off zero watt, D3Cold-VRAM Self Refresh.

i915 requires to evict the lmem objects to smem in order to
support D3Cold-Off, which increases i915 the suspend/resume
latency. Enabling VRAM Self Refresh feature optimize the
latency with additional power cost which required to retain
the lmem.

Adding intel_runtime_idle (runtime_idle callback) to enable
VRAM_SR, it will be used for policy to choose
between D3Cold-off vs D3Cold-VRAM_SR.

Since we have introduced i915 runtime_idle callback.
It need to be warranted that Runtime PM Core invokes runtime_idle
callback when runtime usages count becomes zero. That requires
to use pm_runtime_put instead of pm_runtime_put_autosuspend.

TODO: GuC interface state save/restore.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c      | 26 +++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
 2 files changed, 27 insertions(+), 2 deletions(-)

Comments

Jani Nikula June 16, 2022, 2:32 p.m. UTC | #1
On Thu, 16 Jun 2022, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> Intel Client DGFX card supports D3Cold with two option.
> D3Cold-off zero watt, D3Cold-VRAM Self Refresh.
>
> i915 requires to evict the lmem objects to smem in order to
> support D3Cold-Off, which increases i915 the suspend/resume
> latency. Enabling VRAM Self Refresh feature optimize the
> latency with additional power cost which required to retain
> the lmem.
>
> Adding intel_runtime_idle (runtime_idle callback) to enable
> VRAM_SR, it will be used for policy to choose
> between D3Cold-off vs D3Cold-VRAM_SR.
>
> Since we have introduced i915 runtime_idle callback.
> It need to be warranted that Runtime PM Core invokes runtime_idle
> callback when runtime usages count becomes zero. That requires
> to use pm_runtime_put instead of pm_runtime_put_autosuspend.
>
> TODO: GuC interface state save/restore.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Chris Wilson <chris.p.wilson@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_driver.c      | 26 +++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
>  2 files changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index aa1fb15b1f11..fcff5f3fe05e 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1557,6 +1557,31 @@ static int i915_pm_restore(struct device *kdev)
>  	return i915_pm_resume(kdev);
>  }
>  
> +static int intel_runtime_idle(struct device *kdev)
> +{
> +	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> +	int ret = 1;
> +
> +	if (!HAS_LMEM_SR(dev_priv)) {
> +		/*TODO: Prepare for D3Cold-Off */
> +		goto out;
> +	}
> +
> +	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> +
> +	ret = intel_pm_vram_sr(dev_priv, true);
> +	if (!ret)
> +		drm_dbg(&dev_priv->drm, "VRAM Self Refresh enabled\n");

Please add the debug in the intel_pm_vram_sr() function instead.

BR,
Jani.

> +
> +	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> +
> +out:
> +	pm_runtime_mark_last_busy(kdev);
> +	pm_runtime_autosuspend(kdev);
> +
> +	return ret;
> +}
> +
>  static int intel_runtime_suspend(struct device *kdev)
>  {
>  	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> @@ -1742,6 +1767,7 @@ const struct dev_pm_ops i915_pm_ops = {
>  	.restore = i915_pm_restore,
>  
>  	/* S0ix (via runtime suspend) event handlers */
> +	.runtime_idle = intel_runtime_idle,
>  	.runtime_suspend = intel_runtime_suspend,
>  	.runtime_resume = intel_runtime_resume,
>  };
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 6ed5786bcd29..4dade7e8a795 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -492,8 +492,7 @@ static void __intel_runtime_pm_put(struct intel_runtime_pm *rpm,
>  
>  	intel_runtime_pm_release(rpm, wakelock);
>  
> -	pm_runtime_mark_last_busy(kdev);
> -	pm_runtime_put_autosuspend(kdev);
> +	pm_runtime_put(kdev);
>  }
>  
>  /**
Gupta, Anshuman June 17, 2022, 9:36 a.m. UTC | #2
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Thursday, June 16, 2022 8:02 PM
> To: Gupta, Anshuman <anshuman.gupta@intel.com>; intel-
> gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Wilson, Chris P <chris.p.wilson@intel.com>; Vivi, Rodrigo
> <rodrigo.vivi@intel.com>
> Subject: Re: [Intel-gfx] [PATCH v2 7/9] drm/i915/rpm: Enable D3Cold VRAM SR
> Support
> 
> On Thu, 16 Jun 2022, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> > Intel Client DGFX card supports D3Cold with two option.
> > D3Cold-off zero watt, D3Cold-VRAM Self Refresh.
> >
> > i915 requires to evict the lmem objects to smem in order to support
> > D3Cold-Off, which increases i915 the suspend/resume latency. Enabling
> > VRAM Self Refresh feature optimize the latency with additional power
> > cost which required to retain the lmem.
> >
> > Adding intel_runtime_idle (runtime_idle callback) to enable VRAM_SR,
> > it will be used for policy to choose between D3Cold-off vs
> > D3Cold-VRAM_SR.
> >
> > Since we have introduced i915 runtime_idle callback.
> > It need to be warranted that Runtime PM Core invokes runtime_idle
> > callback when runtime usages count becomes zero. That requires to use
> > pm_runtime_put instead of pm_runtime_put_autosuspend.
> >
> > TODO: GuC interface state save/restore.
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Chris Wilson <chris.p.wilson@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_driver.c      | 26 +++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
> >  2 files changed, 27 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c
> > b/drivers/gpu/drm/i915/i915_driver.c
> > index aa1fb15b1f11..fcff5f3fe05e 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -1557,6 +1557,31 @@ static int i915_pm_restore(struct device *kdev)
> >  	return i915_pm_resume(kdev);
> >  }
> >
> > +static int intel_runtime_idle(struct device *kdev) {
> > +	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> > +	int ret = 1;
> > +
> > +	if (!HAS_LMEM_SR(dev_priv)) {
> > +		/*TODO: Prepare for D3Cold-Off */
> > +		goto out;
> > +	}
> > +
> > +	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> > +
> > +	ret = intel_pm_vram_sr(dev_priv, true);
> > +	if (!ret)
> > +		drm_dbg(&dev_priv->drm, "VRAM Self Refresh enabled\n");
> 
> Please add the debug in the intel_pm_vram_sr() function instead.
Thanks for review comment, will fix this.
Regards,
Anshuman Gupta.
> 
> BR,
> Jani.
> 
> > +
> > +	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> > +
> > +out:
> > +	pm_runtime_mark_last_busy(kdev);
> > +	pm_runtime_autosuspend(kdev);
> > +
> > +	return ret;
> > +}
> > +
> >  static int intel_runtime_suspend(struct device *kdev)  {
> >  	struct drm_i915_private *dev_priv = kdev_to_i915(kdev); @@ -1742,6
> > +1767,7 @@ const struct dev_pm_ops i915_pm_ops = {
> >  	.restore = i915_pm_restore,
> >
> >  	/* S0ix (via runtime suspend) event handlers */
> > +	.runtime_idle = intel_runtime_idle,
> >  	.runtime_suspend = intel_runtime_suspend,
> >  	.runtime_resume = intel_runtime_resume,  }; diff --git
> > a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 6ed5786bcd29..4dade7e8a795 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -492,8 +492,7 @@ static void __intel_runtime_pm_put(struct
> > intel_runtime_pm *rpm,
> >
> >  	intel_runtime_pm_release(rpm, wakelock);
> >
> > -	pm_runtime_mark_last_busy(kdev);
> > -	pm_runtime_put_autosuspend(kdev);
> > +	pm_runtime_put(kdev);
> >  }
> >
> >  /**
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index aa1fb15b1f11..fcff5f3fe05e 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1557,6 +1557,31 @@  static int i915_pm_restore(struct device *kdev)
 	return i915_pm_resume(kdev);
 }
 
+static int intel_runtime_idle(struct device *kdev)
+{
+	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
+	int ret = 1;
+
+	if (!HAS_LMEM_SR(dev_priv)) {
+		/*TODO: Prepare for D3Cold-Off */
+		goto out;
+	}
+
+	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+
+	ret = intel_pm_vram_sr(dev_priv, true);
+	if (!ret)
+		drm_dbg(&dev_priv->drm, "VRAM Self Refresh enabled\n");
+
+	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+
+out:
+	pm_runtime_mark_last_busy(kdev);
+	pm_runtime_autosuspend(kdev);
+
+	return ret;
+}
+
 static int intel_runtime_suspend(struct device *kdev)
 {
 	struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
@@ -1742,6 +1767,7 @@  const struct dev_pm_ops i915_pm_ops = {
 	.restore = i915_pm_restore,
 
 	/* S0ix (via runtime suspend) event handlers */
+	.runtime_idle = intel_runtime_idle,
 	.runtime_suspend = intel_runtime_suspend,
 	.runtime_resume = intel_runtime_resume,
 };
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 6ed5786bcd29..4dade7e8a795 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -492,8 +492,7 @@  static void __intel_runtime_pm_put(struct intel_runtime_pm *rpm,
 
 	intel_runtime_pm_release(rpm, wakelock);
 
-	pm_runtime_mark_last_busy(kdev);
-	pm_runtime_put_autosuspend(kdev);
+	pm_runtime_put(kdev);
 }
 
 /**