| Message ID | 20220610084340.2268-2-ctcchien@nuvoton.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | EDAC: nuvoton: Add nuvoton NPCM memory controller driver | expand |
On Fri, Jun 10, 2022 at 04:43:38PM +0800, medadyoung@gmail.com wrote: > diff --git a/MAINTAINERS b/MAINTAINERS > index 4383949ff654..7f832e6ed4e5 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2367,12 +2367,14 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) > S: Supported > F: Documentation/devicetree/bindings/*/*/*npcm* > F: Documentation/devicetree/bindings/*/*npcm* > +F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml > F: arch/arm/boot/dts/nuvoton-npcm* > F: arch/arm/mach-npcm/ > F: drivers/*/*npcm* > F: drivers/*/*/*npcm* > F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h > > + That looks like it went in when committing. You can remove it in case you have to resend v13.
Hello Borislav, Thanks for your comments. I add milkfafa@gmail.com into this mail thread, and he is going to follow up this EDAC driver. He will be in charge of maintaining this driver. thanks Borislav Petkov <bp@alien8.de> 於 2022年6月21日 週二 凌晨12:40寫道： > > On Fri, Jun 10, 2022 at 04:43:38PM +0800, medadyoung@gmail.com wrote: > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 4383949ff654..7f832e6ed4e5 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -2367,12 +2367,14 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) > > S: Supported > > F: Documentation/devicetree/bindings/*/*/*npcm* > > F: Documentation/devicetree/bindings/*/*npcm* > > +F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml > > F: arch/arm/boot/dts/nuvoton-npcm* > > F: arch/arm/mach-npcm/ > > F: drivers/*/*npcm* > > F: drivers/*/*/*npcm* > > F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h > > > > + > > That looks like it went in when committing. You can remove it in case > you have to resend v13. > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette B.R. Medad
Hi Borislav, Thanks for the review. I'll address the problems you have mentioned and send v13. Regards, Marvin
diff --git a/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml new file mode 100644 index 000000000000..a5c8d332d1c1 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/nuvoton,npcm-memory-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Memory Controller + +maintainers: + - Medad CChien <ctcchien@nuvoton.com> + - Stanley Chu <yschu@nuvoton.com> + +description: | + The Nuvoton BMC SoC supports DDR4 memory with and without ECC (error + correction check). + + The memory controller supports single bit error correction, double bit + error detection (in-line ECC in which a section (1/8th) of the memory + device used to store data is used for ECC storage). + + Note, the bootloader must configure ECC mode for the memory controller. + +properties: + compatible: + enum: + - nuvoton,npcm750-memory-controller + - nuvoton,npcm845-memory-controller + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: uncorrectable error interrupt + - description: correctable error interrupt + + interrupt-names: + minItems: 1 + items: + - const: ue + - const: ce + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + ahb { + #address-cells = <2>; + #size-cells = <2>; + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm750-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 4383949ff654..7f832e6ed4e5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2367,12 +2367,14 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/*/*/*npcm* F: Documentation/devicetree/bindings/*/*npcm* +F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml F: arch/arm/boot/dts/nuvoton-npcm* F: arch/arm/mach-npcm/ F: drivers/*/*npcm* F: drivers/*/*/*npcm* F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h + ARM/NUVOTON WPCM450 ARCHITECTURE M: Jonathan Neuschäfer <j.neuschaefer@gmx.net> L: openbmc@lists.ozlabs.org (moderated for non-subscribers)