| Message ID | 20220626183247.142776-3-david@ixit.cz (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v4,1/3] ARM: dts: qcom: extend scm compatible to match dt-schema | expand |
On 26/06/2022 20:32, David Heidelberg wrote: > Convert Qualcomm SCM firmware binding to the yaml format. > > This commit also: > - adds qcom,scm-mdm9607 into list which has only core clock > - adds qcom,scm-sm6125, qcom,scm-ipq6018 > - #reset-cells, because the property is already used > > Signed-off-by: David Heidelberg <david@ixit.cz> > -- > v4: > - added clocks minItems and maxItems > - removed quotes from $id and $schema > - adjusted description of TCSR HW block Thank you for your patch. There is something to discuss/improve. > +properties: > + compatible: > + items: > + - enum: > + - qcom,scm-apq8064 > + - qcom,scm-apq8084 > + - qcom,scm-ipq4019 > + - qcom,scm-ipq6018 > + - qcom,scm-ipq806x > + - qcom,scm-ipq8074 > + - qcom,scm-mdm9607 > + - qcom,scm-msm8226 > + - qcom,scm-msm8660 > + - qcom,scm-msm8916 > + - qcom,scm-msm8953 > + - qcom,scm-msm8960 > + - qcom,scm-msm8974 > + - qcom,scm-msm8976 > + - qcom,scm-msm8994 > + - qcom,scm-msm8996 > + - qcom,scm-msm8998 > + - qcom,scm-sc7180 > + - qcom,scm-sc7280 > + - qcom,scm-sdm845 > + - qcom,scm-sdx55 > + - qcom,scm-sm6125 > + - qcom,scm-sm6350 > + - qcom,scm-sm8150 > + - qcom,scm-sm8250 > + - qcom,scm-sm8350 > + - qcom,scm-sm8450 > + - qcom,scm-qcs404 > + - const: qcom,scm > + > + clocks: > + minItems: 1 > + maxItems: 3 > + > + clock-names: > + minItems: 1 > + maxItems: 3 > + > + '#reset-cells': > + const: 1 > + > + qcom,dload-mode: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to TCSR hardware block > + - description: offset of the download mode control register > + description: TCSR hardware block > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,scm-apq8064 > + - qcom,scm-mdm9607 > + - qcom,scm-msm8660 > + - qcom,scm-msm8960 > + then: > + properties: > + clock-names: > + items: > + - const: core > + > + clocks: > + maxItems: 1 > + > + required: > + - clocks > + - clock-names > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,scm-apq8084 > + - qcom,scm-msm8916 > + - qcom,scm-msm8953 > + - qcom,scm-msm8974 > + - qcom,scm-msm8976 > + then: > + properties: > + clock-names: > + items: > + - const: core > + - const: bus > + - const: iface > + > + clocks: > + minItems: 3 > + maxItems: 3 > + > + Just one blank line. > + required: > + - clocks > + - clock-names > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + include <dt-bindings/clock/qcom,gcc-msm8916.h> > + > + firmware { > + scm { > + compatible = "qcom,msm8916", "qcom,scm"; > + clocks = <&gcc GCC_CRYPTO_CLK>, > + <&gcc GCC_CRYPTO_AXI_CLK>, > + <&gcc GCC_CRYPTO_AHB_CLK>; > + clock-names = "core", "bus", "iface"; > + }; > + }; Best regards, Krzysztof
On Sun, 26 Jun 2022 20:32:47 +0200, David Heidelberg wrote: > Convert Qualcomm SCM firmware binding to the yaml format. > > This commit also: > - adds qcom,scm-mdm9607 into list which has only core clock > - adds qcom,scm-sm6125, qcom,scm-ipq6018 > - #reset-cells, because the property is already used > > Signed-off-by: David Heidelberg <david@ixit.cz> > -- > v4: > - added clocks minItems and maxItems > - removed quotes from $id and $schema > - adjusted description of TCSR HW block > v3: > - add preceding patches for ARM and arm64 adding missing compatible strings > - extended with missing compatible strings > - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969 > v2: > - changed maintainer to Bjorn > - document #reset-cells > --- > .../devicetree/bindings/firmware/qcom,scm.txt | 57 ------- > .../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++ > 2 files changed, 140 insertions(+), 57 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt > create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Error: Documentation/devicetree/bindings/firmware/qcom,scm.example.dts:18.17-18 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:383: Documentation/devicetree/bindings/firmware/qcom,scm.example.dtb] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1404: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Jun 26 2022 20:32, David Heidelberg wrote: > Convert Qualcomm SCM firmware binding to the yaml format. > > This commit also: > - adds qcom,scm-mdm9607 into list which has only core clock > - adds qcom,scm-sm6125, qcom,scm-ipq6018 > - #reset-cells, because the property is already used > > Signed-off-by: David Heidelberg <david@ixit.cz> > -- > v4: > - added clocks minItems and maxItems > - removed quotes from $id and $schema > - adjusted description of TCSR HW block > v3: > - add preceding patches for ARM and arm64 adding missing compatible strings > - extended with missing compatible strings > - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969 > v2: > - changed maintainer to Bjorn > - document #reset-cells > --- > .../devicetree/bindings/firmware/qcom,scm.txt | 57 ------- > .../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++ > 2 files changed, 140 insertions(+), 57 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt > create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml > > diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt > deleted file mode 100644 > index 0f4e5ab26477..000000000000 > --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt > +++ /dev/null > @@ -1,57 +0,0 @@ > -QCOM Secure Channel Manager (SCM) > - > -Qualcomm processors include an interface to communicate to the secure firmware. > -This interface allows for clients to request different types of actions. These > -can include CPU power up/down, HDCP requests, loading of firmware, and other > -assorted actions. > - > -Required properties: > -- compatible: must contain one of the following: > - * "qcom,scm-apq8064" > - * "qcom,scm-apq8084" > - * "qcom,scm-ipq4019" > - * "qcom,scm-ipq806x" > - * "qcom,scm-ipq8074" > - * "qcom,scm-mdm9607" > - * "qcom,scm-msm8226" > - * "qcom,scm-msm8660" > - * "qcom,scm-msm8916" > - * "qcom,scm-msm8953" > - * "qcom,scm-msm8960" > - * "qcom,scm-msm8974" > - * "qcom,scm-msm8976" > - * "qcom,scm-msm8994" > - * "qcom,scm-msm8996" > - * "qcom,scm-msm8998" > - * "qcom,scm-sc7180" > - * "qcom,scm-sc7280" > - * "qcom,scm-sdm845" > - * "qcom,scm-sdx55" > - * "qcom,scm-sm6350" > - * "qcom,scm-sm8150" > - * "qcom,scm-sm8250" > - * "qcom,scm-sm8350" > - * "qcom,scm-sm8450" > - and: > - * "qcom,scm" > -- clocks: Specifies clocks needed by the SCM interface, if any: > - * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and > - "qcom,scm-msm8960" > - * core, iface and bus clocks required for "qcom,scm-apq8084", > - "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976" > -- clock-names: Must contain "core" for the core clock, "iface" for the interface > - clock and "bus" for the bus clock per the requirements of the compatible. > -- qcom,dload-mode: phandle to the TCSR hardware block and offset of the > - download mode control register (optional) > - > -Example for MSM8916: > - > - firmware { > - scm { > - compatible = "qcom,msm8916", "qcom,scm"; > - clocks = <&gcc GCC_CRYPTO_CLK> , > - <&gcc GCC_CRYPTO_AXI_CLK>, > - <&gcc GCC_CRYPTO_AHB_CLK>; > - clock-names = "core", "bus", "iface"; > - }; > - }; > diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml > new file mode 100644 > index 000000000000..b01acbd1e408 > --- /dev/null > +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml > @@ -0,0 +1,140 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: QCOM Secure Channel Manager (SCM) > + > +description: | > + Qualcomm processors include an interface to communicate to the secure firmware. > + This interface allows for clients to request different types of actions. > + These can include CPU power up/down, HDCP requests, loading of firmware, > + and other assorted actions. > + > +maintainers: > + - Bjorn Andersson <bjorn.andersson@linaro.org> > + - Robert Marko <robimarko@gmail.com> > + - Guru Das Srinagesh <quic_gurus@quicinc.com> > + > +properties: > + compatible: > + items: > + - enum: > + - qcom,scm-apq8064 > + - qcom,scm-apq8084 > + - qcom,scm-ipq4019 > + - qcom,scm-ipq6018 > + - qcom,scm-ipq806x > + - qcom,scm-ipq8074 > + - qcom,scm-mdm9607 > + - qcom,scm-msm8226 > + - qcom,scm-msm8660 > + - qcom,scm-msm8916 > + - qcom,scm-msm8953 > + - qcom,scm-msm8960 > + - qcom,scm-msm8974 > + - qcom,scm-msm8976 > + - qcom,scm-msm8994 > + - qcom,scm-msm8996 > + - qcom,scm-msm8998 > + - qcom,scm-sc7180 > + - qcom,scm-sc7280 > + - qcom,scm-sdm845 > + - qcom,scm-sdx55 > + - qcom,scm-sm6125 > + - qcom,scm-sm6350 > + - qcom,scm-sm8150 > + - qcom,scm-sm8250 > + - qcom,scm-sm8350 > + - qcom,scm-sm8450 > + - qcom,scm-qcs404 > + - const: qcom,scm > + > + clocks: > + minItems: 1 > + maxItems: 3 > + > + clock-names: > + minItems: 1 > + maxItems: 3 > + > + '#reset-cells': > + const: 1 > + > + qcom,dload-mode: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to TCSR hardware block > + - description: offset of the download mode control register > + description: TCSR hardware block > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,scm-apq8064 scm-apq8064 doesn't have the clock specified in the driver (there's a FIXME comment to specify it), so even though the DT node specifies the clock, it currently has no effect. We would need to check if the conditions for re-enabling the clock are satisfied, and update the driver for this to take effect. > + - qcom,scm-mdm9607 scm-mdm9607 has three clocks listed in the driver, not one. Please move this to the "three-clocks" list below. > + - qcom,scm-msm8660 > + - qcom,scm-msm8960 These two are good - they are listed as having a single clock each in the driver. > + then: > + properties: > + clock-names: > + items: > + - const: core > + > + clocks: > + maxItems: 1 > + > + required: > + - clocks > + - clock-names > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,scm-apq8084 > + - qcom,scm-msm8916 > + - qcom,scm-msm8953 > + - qcom,scm-msm8974 > + - qcom,scm-msm8976 Verified that the above five nodes are all listed as supporting three clocks each in the driver. > + then: > + properties: > + clock-names: > + items: > + - const: core > + - const: bus > + - const: iface > + > + clocks: > + minItems: 3 > + maxItems: 3 > + > + > + required: > + - clocks > + - clock-names > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + include <dt-bindings/clock/qcom,gcc-msm8916.h> > + > + firmware { > + scm { > + compatible = "qcom,msm8916", "qcom,scm"; > + clocks = <&gcc GCC_CRYPTO_CLK>, > + <&gcc GCC_CRYPTO_AXI_CLK>, > + <&gcc GCC_CRYPTO_AHB_CLK>; > + clock-names = "core", "bus", "iface"; > + }; > + }; > -- > 2.35.1 >
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt deleted file mode 100644 index 0f4e5ab26477..000000000000 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ /dev/null @@ -1,57 +0,0 @@ -QCOM Secure Channel Manager (SCM) - -Qualcomm processors include an interface to communicate to the secure firmware. -This interface allows for clients to request different types of actions. These -can include CPU power up/down, HDCP requests, loading of firmware, and other -assorted actions. - -Required properties: -- compatible: must contain one of the following: - * "qcom,scm-apq8064" - * "qcom,scm-apq8084" - * "qcom,scm-ipq4019" - * "qcom,scm-ipq806x" - * "qcom,scm-ipq8074" - * "qcom,scm-mdm9607" - * "qcom,scm-msm8226" - * "qcom,scm-msm8660" - * "qcom,scm-msm8916" - * "qcom,scm-msm8953" - * "qcom,scm-msm8960" - * "qcom,scm-msm8974" - * "qcom,scm-msm8976" - * "qcom,scm-msm8994" - * "qcom,scm-msm8996" - * "qcom,scm-msm8998" - * "qcom,scm-sc7180" - * "qcom,scm-sc7280" - * "qcom,scm-sdm845" - * "qcom,scm-sdx55" - * "qcom,scm-sm6350" - * "qcom,scm-sm8150" - * "qcom,scm-sm8250" - * "qcom,scm-sm8350" - * "qcom,scm-sm8450" - and: - * "qcom,scm" -- clocks: Specifies clocks needed by the SCM interface, if any: - * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and - "qcom,scm-msm8960" - * core, iface and bus clocks required for "qcom,scm-apq8084", - "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976" -- clock-names: Must contain "core" for the core clock, "iface" for the interface - clock and "bus" for the bus clock per the requirements of the compatible. -- qcom,dload-mode: phandle to the TCSR hardware block and offset of the - download mode control register (optional) - -Example for MSM8916: - - firmware { - scm { - compatible = "qcom,msm8916", "qcom,scm"; - clocks = <&gcc GCC_CRYPTO_CLK> , - <&gcc GCC_CRYPTO_AXI_CLK>, - <&gcc GCC_CRYPTO_AHB_CLK>; - clock-names = "core", "bus", "iface"; - }; - }; diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml new file mode 100644 index 000000000000..b01acbd1e408 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM Secure Channel Manager (SCM) + +description: | + Qualcomm processors include an interface to communicate to the secure firmware. + This interface allows for clients to request different types of actions. + These can include CPU power up/down, HDCP requests, loading of firmware, + and other assorted actions. + +maintainers: + - Bjorn Andersson <bjorn.andersson@linaro.org> + - Robert Marko <robimarko@gmail.com> + - Guru Das Srinagesh <quic_gurus@quicinc.com> + +properties: + compatible: + items: + - enum: + - qcom,scm-apq8064 + - qcom,scm-apq8084 + - qcom,scm-ipq4019 + - qcom,scm-ipq6018 + - qcom,scm-ipq806x + - qcom,scm-ipq8074 + - qcom,scm-mdm9607 + - qcom,scm-msm8226 + - qcom,scm-msm8660 + - qcom,scm-msm8916 + - qcom,scm-msm8953 + - qcom,scm-msm8960 + - qcom,scm-msm8974 + - qcom,scm-msm8976 + - qcom,scm-msm8994 + - qcom,scm-msm8996 + - qcom,scm-msm8998 + - qcom,scm-sc7180 + - qcom,scm-sc7280 + - qcom,scm-sdm845 + - qcom,scm-sdx55 + - qcom,scm-sm6125 + - qcom,scm-sm6350 + - qcom,scm-sm8150 + - qcom,scm-sm8250 + - qcom,scm-sm8350 + - qcom,scm-sm8450 + - qcom,scm-qcs404 + - const: qcom,scm + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + '#reset-cells': + const: 1 + + qcom,dload-mode: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to TCSR hardware block + - description: offset of the download mode control register + description: TCSR hardware block + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,scm-apq8064 + - qcom,scm-mdm9607 + - qcom,scm-msm8660 + - qcom,scm-msm8960 + then: + properties: + clock-names: + items: + - const: core + + clocks: + maxItems: 1 + + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + enum: + - qcom,scm-apq8084 + - qcom,scm-msm8916 + - qcom,scm-msm8953 + - qcom,scm-msm8974 + - qcom,scm-msm8976 + then: + properties: + clock-names: + items: + - const: core + - const: bus + - const: iface + + clocks: + minItems: 3 + maxItems: 3 + + + required: + - clocks + - clock-names + +required: + - compatible + +additionalProperties: false + +examples: + - | + include <dt-bindings/clock/qcom,gcc-msm8916.h> + + firmware { + scm { + compatible = "qcom,msm8916", "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };
Convert Qualcomm SCM firmware binding to the yaml format. This commit also: - adds qcom,scm-mdm9607 into list which has only core clock - adds qcom,scm-sm6125, qcom,scm-ipq6018 - #reset-cells, because the property is already used Signed-off-by: David Heidelberg <david@ixit.cz> -- v4: - added clocks minItems and maxItems - removed quotes from $id and $schema - adjusted description of TCSR HW block v3: - add preceding patches for ARM and arm64 adding missing compatible strings - extended with missing compatible strings - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969 v2: - changed maintainer to Bjorn - document #reset-cells --- .../devicetree/bindings/firmware/qcom,scm.txt | 57 ------- .../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++ 2 files changed, 140 insertions(+), 57 deletions(-) delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml