| Message ID | 20220624144001.95518-13-clement.leger@bootlin.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 066c3bd358355185d9313358281fe03113c0a9ad |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | add support for Renesas RZ/N1 ethernet subsystem devices | expand |
On 6/24/2022 7:39 AM, Clément Léger wrote: > Add the MII converter node which describes the MII converter that is > present on the RZ/N1 SoC. > > Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
On Fri, Jun 24, 2022 at 4:41 PM Clément Léger <clement.leger@bootlin.com> wrote: > Add the MII converter node which describes the MII converter that is > present on the RZ/N1 SoC. > > Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.20. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index d3665910958b..f6241af33112 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -304,6 +304,45 @@ dma1: dma-controller@40105000 { data-width = <8>; }; + eth_miic: eth-miic@44030000 { + compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x44030000 0x10000>; + clocks = <&sysctrl R9A06G032_CLK_MII_REF>, + <&sysctrl R9A06G032_CLK_RGMII_REF>, + <&sysctrl R9A06G032_CLK_RMII_REF>, + <&sysctrl R9A06G032_HCLK_SWITCH_RG>; + clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk"; + power-domains = <&sysctrl>; + status = "disabled"; + + mii_conv1: mii-conv@1 { + reg = <1>; + status = "disabled"; + }; + + mii_conv2: mii-conv@2 { + reg = <2>; + status = "disabled"; + }; + + mii_conv3: mii-conv@3 { + reg = <3>; + status = "disabled"; + }; + + mii_conv4: mii-conv@4 { + reg = <4>; + status = "disabled"; + }; + + mii_conv5: mii-conv@5 { + reg = <5>; + status = "disabled"; + }; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller;
Add the MII converter node which describes the MII converter that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger <clement.leger@bootlin.com> --- arch/arm/boot/dts/r9a06g032.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)