diff mbox series

[10/11] ARM: dts: qcom: sdx65: Add Watchdog support

Message ID 1654080312-5408-11-git-send-email-quic_rohiagar@quicinc.com (mailing list archive)
State Accepted
Headers show
Series Devicetree Changes SDX65 | expand

Commit Message

Rohit Agarwal June 1, 2022, 10:45 a.m. UTC 
Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 arch/arm/boot/dts/qcom-sdx65.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Krzysztof Kozlowski June 1, 2022, 11:03 a.m. UTC | #1 
On 01/06/2022 12:45, Rohit Agarwal wrote:
> Enable Watchdog support for Application Processor Subsystem (APSS) block
> on SDX65 platform.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
>  arch/arm/boot/dts/qcom-sdx65.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 5e4687d..c76f330 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -513,6 +513,13 @@
>  			#clock-cells = <0>;
>  		};
>  
> +		watchdog@17817000 {
> +			compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt";
> +			reg = <0x17817000 0x1000>;
> +			clocks = <&sleep_clk>;
> +		};
> +

Just one line break, please.



Best regards,
Krzysztof
Bjorn Andersson June 28, 2022, 8:19 p.m. UTC | #2 
On Wed, 1 Jun 2022 16:15:11 +0530, Rohit Agarwal wrote:
> Enable Watchdog support for Application Processor Subsystem (APSS) block
> on SDX65 platform.
> 
> 

Applied, thanks!

[10/11] ARM: dts: qcom: sdx65: Add Watchdog support
        commit: 39eebfce4bdb88f53959d570ab9c8956bb9f0988

Best regards,
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 5e4687d..c76f330 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -513,6 +513,13 @@ 
 			#clock-cells = <0>;
 		};
 
+		watchdog@17817000 {
+			compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt";
+			reg = <0x17817000 0x1000>;
+			clocks = <&sleep_clk>;
+		};
+
+
 		timer@17820000 {
 			#address-cells = <1>;
 			#size-cells = <1>;