| Message ID | 20220428181703.2194171-7-sean.anderson@seco.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | nvmem: sfp: binding updates and additions | expand |
On Thu, Apr 28, 2022 at 02:17:00PM -0400, Sean Anderson wrote: > This adds an appropriate SFP binding for Trust Architecture 2.1 devices. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > (no changes since v1) > > arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++ Separate patches for arm and arm64 DTS, please. Also prefix arm patches like 'ARM: dts: ...', while 'arm64: dts: ...' for arm64 ones. Shawn > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 8 ++++++++ > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 8 ++++++++ > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 8 ++++++++ > 4 files changed, 31 insertions(+) > > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi > index 2e69d6eab4d1..c1e94a317cba 100644 > --- a/arch/arm/boot/dts/ls1021a.dtsi > +++ b/arch/arm/boot/dts/ls1021a.dtsi > @@ -129,6 +129,13 @@ ifc: ifc@1530000 { > status = "disabled"; > }; > > + sfp: efuse@1e80000 { > + compatible = "fsl,ls1021a-sfp"; > + reg = <0x0 0x1e80000 0x0 0x10000>; > + clocks = <&clockgen 4 3>; > + clock-names = "sfp"; > + }; > + > dcfg: dcfg@1ee0000 { > compatible = "fsl,ls1021a-dcfg", "syscon"; > reg = <0x0 0x1ee0000 0x0 0x1000>; > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi > index 50a72cda4727..47ce525e0a72 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi > @@ -271,6 +271,14 @@ rtic_d: rtic-d@60 { > }; > }; > > + sfp: efuse@1e80000 { > + compatible = "fsl,ls1021a-sfp"; > + reg = <0x0 0x1e80000 0x0 0x10000>; > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > + QORIQ_CLK_PLL_DIV(4)>; > + clock-names = "sfp"; > + }; > + > sec_mon: sec_mon@1e90000 { > compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon", > "fsl,sec-v4.0-mon"; > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi > index 35d1939e690b..b0ab0b19de7e 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi > @@ -383,6 +383,14 @@ sec_jr3: jr@40000 { > }; > }; > > + sfp: efuse@1e80000 { > + compatible = "fsl,ls1021a-sfp"; > + reg = <0x0 0x1e80000 0x0 0x10000>; > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > + QORIQ_CLK_PLL_DIV(4)>; > + clock-names = "sfp"; > + }; > + > dcfg: dcfg@1ee0000 { > compatible = "fsl,ls1043a-dcfg", "syscon"; > reg = <0x0 0x1ee0000 0x0 0x10000>; > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > index 4e7bd04d9798..c30056afc02a 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > @@ -413,6 +413,14 @@ bportals: bman-portals@508000000 { > ranges = <0x0 0x5 0x08000000 0x8000000>; > }; > > + sfp: efuse@1e80000 { > + compatible = "fsl,ls1021a-sfp"; > + reg = <0x0 0x1e80000 0x0 0x10000>; > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL > + QORIQ_CLK_PLL_DIV(4)>; > + clock-names = "sfp"; > + }; > + > dcfg: dcfg@1ee0000 { > compatible = "fsl,ls1046a-dcfg", "syscon"; > reg = <0x0 0x1ee0000 0x0 0x1000>; > -- > 2.35.1.1320.gc452695387.dirty >
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 2e69d6eab4d1..c1e94a317cba 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -129,6 +129,13 @@ ifc: ifc@1530000 { status = "disabled"; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen 4 3>; + clock-names = "sfp"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1021a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x1000>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 50a72cda4727..47ce525e0a72 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -271,6 +271,14 @@ rtic_d: rtic-d@60 { }; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; + }; + sec_mon: sec_mon@1e90000 { compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon"; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 35d1939e690b..b0ab0b19de7e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -383,6 +383,14 @@ sec_jr3: jr@40000 { }; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1043a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 4e7bd04d9798..c30056afc02a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -413,6 +413,14 @@ bportals: bman-portals@508000000 { ranges = <0x0 0x5 0x08000000 0x8000000>; }; + sfp: efuse@1e80000 { + compatible = "fsl,ls1021a-sfp"; + reg = <0x0 0x1e80000 0x0 0x10000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; + }; + dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; reg = <0x0 0x1ee0000 0x0 0x1000>;
This adds an appropriate SFP binding for Trust Architecture 2.1 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- (no changes since v1) arch/arm/boot/dts/ls1021a.dtsi | 7 +++++++ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 8 ++++++++ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 8 ++++++++ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 8 ++++++++ 4 files changed, 31 insertions(+)