Message ID | 1656405589-29850-1-git-send-email-shengjiu.wang@nxp.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 3b13b1437dcce4469db575c60d1da4fa9ff80694 |
Headers | show |
Series | ASoC: fsl_micfil: change micfil default settings | expand |
On Tue, 28 Jun 2022 16:39:49 +0800, Shengjiu Wang wrote: > Previous default settings resulted in loose dynamic > range and low sound level. > New default configuration changes: > - outgain = 2 > - quality mode = VLOW0 > - dc remover = bypass > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: fsl_micfil: change micfil default settings commit: 3b13b1437dcce4469db575c60d1da4fa9ff80694 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 25c647ae080a..18ab80b68752 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -48,6 +48,7 @@ struct fsl_micfil { char name[32]; int irq[MICFIL_IRQ_LINES]; enum quality quality; + int dc_remover; }; struct fsl_micfil_soc_data { @@ -336,12 +337,25 @@ static const struct snd_soc_dai_ops fsl_micfil_dai_ops = { static int fsl_micfil_dai_probe(struct snd_soc_dai *cpu_dai) { struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); - int ret; + struct device *dev = cpu_dai->dev; + unsigned int val = 0; + int ret, i; + + micfil->quality = QUALITY_VLOW0; - micfil->quality = QUALITY_MEDIUM; + /* set default gain to 2 */ + regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); - /* set default gain to max_gain */ - regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x77777777); + /* set DC Remover in bypass mode*/ + for (i = 0; i < MICFIL_OUTPUT_CHANNELS; i++) + val |= MICFIL_DC_BYPASS << MICFIL_DC_CHX_SHIFT(i); + ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, + MICFIL_DC_CTRL_CONFIG, val); + if (ret) { + dev_err(dev, "failed to set DC Remover mode bits\n"); + return ret; + } + micfil->dc_remover = MICFIL_DC_BYPASS; snd_soc_dai_init_dma_data(cpu_dai, NULL, &micfil->dma_params_rx); diff --git a/sound/soc/fsl/fsl_micfil.h b/sound/soc/fsl/fsl_micfil.h index 053caba3caf3..d60285dd07bc 100644 --- a/sound/soc/fsl/fsl_micfil.h +++ b/sound/soc/fsl/fsl_micfil.h @@ -73,6 +73,15 @@ #define MICFIL_FIFO_STAT_FIFOX_OVER(ch) BIT(ch) #define MICFIL_FIFO_STAT_FIFOX_UNDER(ch) BIT((ch) + 8) +/* MICFIL DC Remover Control Register -- REG_MICFIL_DC_CTRL */ +#define MICFIL_DC_CTRL_CONFIG GENMASK(15, 0) +#define MICFIL_DC_CHX_SHIFT(ch) ((ch) << 1) +#define MICFIL_DC_CHX(ch) GENMASK((((ch) << 1) + 1), ((ch) << 1)) +#define MICFIL_DC_CUTOFF_21HZ 0 +#define MICFIL_DC_CUTOFF_83HZ 1 +#define MICFIL_DC_CUTOFF_152Hz 2 +#define MICFIL_DC_BYPASS 3 + /* MICFIL HWVAD0 Control 1 Register -- REG_MICFIL_VAD0_CTRL1*/ #define MICFIL_VAD0_CTRL1_CHSEL GENMASK(26, 24) #define MICFIL_VAD0_CTRL1_CICOSR GENMASK(19, 16)